Patentable/Patents/US-11404273
US-11404273

Semiconductor structure and forming method thereof

PublishedAugust 2, 2022
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

The present disclosure provides a semiconductor structure and a forming method thereof. One form of a forming method includes: providing a base; forming a plurality of discrete mandrel layers on the base, where an extending direction of the mandrel layers is a first direction, and a direction perpendicular to the first direction is a second direction; forming a plurality of spacer layers covering side walls of the mandrel layers; forming a pattern transfer layer on the base, where the pattern transfer layer covers side walls of the spacer layers; forming a first trench in the pattern transfer layer between adjacent spacer layers in the second direction; removing a mandrel layer to form a second trench after the first trench is formed; and etching the base along the first trench and the second trench to form a target pattern by using the pattern transfer layer and the spacer layer as a mask. In the present disclosure, the accuracy of the pattern transfer is improved.

Patent Claims
10 claims

Legal claims defining the scope of protection, as filed with the USPTO.

3

3. The forming method of a semiconductor structure according to claim 2, wherein after the pattern transfer layer is formed and before the mandrel layer of the plurality of mandrel layers is removed, the spacer material layer is etched back.

4

4. The forming method of a semiconductor structure according to claim 3, wherein after the pattern transfer layer is formed and before the first trench is formed in the pattern transfer layer between adjacent mandrel layers of the plurality of mandrel layers, the spacer material layer is etched back.

6

6. The forming method of a semiconductor structure according to claim 5, after the spacer material layer is etched back and before the first trench is formed in the pattern transfer layer between the adjacent mandrel layers, the forming method further comprises: etching back the pattern transfer layer to enable a top surface of the remaining pattern transfer layer to be flush with the top surface of the mandrel layer.

7

7. The forming method of a semiconductor structure according to claim 1, wherein the method further comprises: after the first trench is formed and before the mandrel layer is removed, forming a barrier layer in the first trench, wherein the barrier layer divides the first trench in the first direction.

9

9. The forming method of a semiconductor structure according to claim 1, wherein the step of forming a first trench in the pattern transfer layer comprises: etching the pattern transfer layer between the adjacent spacer layers using a dry etching process.

10

10. The forming method of a semiconductor structure according to claim 1, wherein in the step of forming a second trench, the mandrel layer is removed using a wet etching process.

11

11. The forming method of a semiconductor structure according to claim 1, wherein the process of forming the spacer layer comprises an atomic layer deposition process.

12

12. The forming method of a semiconductor structure according to claim 1, wherein a material of the mandrel layer comprises at least one of amorphous silicon, polycrystalline silicon, monocrystalline silicon, silicon oxide, advanced patterning film materials, spin on carbon, or silicon carbide.

13

13. The forming method of a semiconductor structure according to claim 1, wherein a material of the spacer layer comprises at least one of titanium oxide, titanium nitride, silicon oxide, silicon nitride, silicon oxynitride, or silicon carbide.

14

14. The forming method of a semiconductor structure according to claim 1, wherein a material of the pattern transfer layer comprises silicon oxide or metal oxide.

Classification Codes (CPC)

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Patent Metadata

Filing Date

January 22, 2021

Publication Date

August 2, 2022

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