A command to read specific data stored at a memory die is received. A read operation is performed while operating both a memory controller and the memory die simultaneously at a first frequency. A processor determines whether a first error rate associated with the memory die satisfies a first error threshold criterion (e.g., UECC). Responsive to determining that the first error rate satisfies the first error threshold criterion, the read operation is repeated while operating at least one of the memory controller or the memory die at a second frequency that is different from the first frequency. The processor determines whether a second error rate associated with the memory die satisfies a second error threshold criterion. Responsive to determining that the second error rate satisfies the second error threshold criterion (e.g. UECC persists), determining that the read operation has failed.
Legal claims defining the scope of protection, as filed with the USPTO.
9. The method of claim 5, wherein the error event comprises an uncorrectable error correcting code (UECC) event.
10. The method of claim 5, wherein an amount by which the operating frequency of at least one of the memory controller and the memory die is adjusted is based on a current state of wear of the memory die within an operating lifetime of the memory die.
11. The method of claim 10, wherein the operating frequency of at least one of the memory controller and the memory die is adjusted periodically during a maintenance process for a memory device that includes the memory die.
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August 18, 2020
September 20, 2022
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