The present disclosure provides a method, a device and a terminal for testing a memory chip. The method may include setting an attack mode and random attack parameters, generating a random attack command according to the attack mode and random attack parameters, attacking the memory chip according to the random attack command, and testing the attacked memory chip and generating a test result. This method is able to simulate various types of attacks and can thus perform a suitable test on the memory chip for the types of the actual attack. In addition, since the attacks can be randomized to any memory cell of the memory chip, testing of the whole memory chip is made possible.
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3. The method of claim 2, wherein setting the attack count includes recording the attack count into the test result when the attack on the memory chip is completed.
6. The method of claim 5, wherein the victims of the aggressor comprise adjacent test lines of the aggressor, or test lines spaced apart from the aggressor by at least one test line.
This invention relates to semiconductor testing, specifically methods for identifying and analyzing signal interference between test lines in integrated circuits. The problem addressed is the need to accurately detect and measure crosstalk effects caused by an aggressor signal line on adjacent or nearby victim signal lines during testing. Crosstalk occurs when an aggressor line's electrical activity induces unwanted signals in neighboring victim lines, potentially leading to measurement errors or circuit malfunctions. The method involves selecting test lines that are either directly adjacent to an aggressor line or spaced apart by at least one intervening test line. These victim lines are monitored to detect interference patterns resulting from the aggressor's signal transitions. By analyzing the timing and amplitude of induced signals in the victim lines, the method quantifies the extent of crosstalk. This approach allows for precise characterization of signal integrity in high-density semiconductor designs where multiple signal lines operate in close proximity. The technique is particularly useful in validating circuit designs where minimizing interference is critical for reliable performance. The method may be implemented in automated test equipment or simulation tools to evaluate and optimize signal routing and shielding strategies in integrated circuits.
7. The method of claim 1, wherein the attack mode comprises Activate, Write, or Read.
13. The device of claim 9, wherein the attack count configuration unit is configured to record the attack count into the test result when the attack on the memory chip is completed.
16. The terminal of claim 15, wherein setting the attack count includes recording the attack count into the test result when the attack on the memory chip is completed.
17. The terminal of claim 14, wherein the aggressor comprises a middle line in the test line set, the test lines comprise word lines, bit lines, or a combination thereof, and the test line set comprises a word line set, or a bit line set, or a combination thereof.
19. The terminal of claim 18, wherein the victims of the aggressor comprise adjacent test lines of the aggressor, or test lines spaced apart from the aggressor by at least one test line.
20. The terminal of claim 14, wherein the attack mode comprises Activate, Write, or Read.
This invention relates to a terminal device designed for secure communication and data handling, particularly in environments where protection against unauthorized access or tampering is critical. The terminal includes a secure element that enforces access control policies to prevent unauthorized operations. The secure element is configured to authenticate users or external devices before allowing access to sensitive data or functions. The terminal also includes a user interface for inputting commands and a communication interface for exchanging data with external systems. A key feature of the terminal is its ability to operate in different attack modes, including Activate, Write, and Read. In Activate mode, the terminal initializes or enables specific functions or security protocols. In Write mode, the terminal allows authorized users or systems to modify stored data, such as configuration settings or cryptographic keys. In Read mode, the terminal retrieves and transmits stored data to authorized recipients. The secure element ensures that these operations are performed only after proper authentication, preventing unauthorized access or data manipulation. The terminal is particularly useful in applications requiring high security, such as financial transactions, identity verification, or industrial control systems.
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March 12, 2021
October 4, 2022
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