A chip, an electronic device, a panel and an operation method thereof are provided. The chip can control the panel to perform fingerprint sensing. Fingerprint sensing pixels of the panel are divided into a plurality of fingerprint zones along a column direction. The chip includes a selecting circuit and a control circuit. The selecting circuit obtains information about a selected fingerprint zone among the fingerprint zones. The control circuit provides multiple control signals for controlling the panel to perform fingerprint sensing. The control signals include multiple start pulse signals. The start pulse signals collectively indicate the selected fingerprint zone. The number of the fingerprint zones is greater than the number of the start pulse signals.
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2. The chip according to claim 1, wherein the start pulse signals are used for controlling the gate lines of the panel.
3. The chip according to claim 2, wherein the start pulse signals are provided to a gate on array (GOA) circuit of the panel configured to generate a plurality of scan signals respectively for controlling the gate lines of the panel.
4. The chip according to claim 3, wherein the GOA circuit comprises a plurality of shift register groups each coupled to a corresponding one of the fingerprint zones and operating according to all of the second number of start pulse signals.
5. The chip according to claim 3, wherein the scan signals are configured to control the corresponding fingerprint sensing pixels to perform resetting operation and/or selecting/writing operation.
6. The chip according to claim 1, wherein the selecting circuit is configured to receive the information about the selected fingerprint zone from a processor configured to determine the selected fingerprint zone according to touch information.
7. The chip according to claim 6, wherein the processor is configured to receive the touch information from a touch control circuit configured to control touch sensing on the panel.
A chip for electronic devices integrates a processor and a touch control circuit to enable touch sensing on a display panel. The processor is configured to receive touch information from the touch control circuit, which is responsible for controlling touch sensing operations on the panel. The touch control circuit detects touch inputs, such as finger or stylus interactions, and processes the raw touch data before transmitting it to the processor. The processor then interprets this touch information to determine touch coordinates, gestures, or other input commands, enabling the device to respond accordingly. This integration allows for seamless touch interaction in devices like smartphones, tablets, or touchscreen computers, improving responsiveness and accuracy in touch-based applications. The system may also include additional components, such as a display driver, to synchronize touch sensing with visual output, ensuring smooth and coordinated user interactions. The design optimizes power efficiency and performance by offloading touch processing tasks to the touch control circuit, reducing the load on the main processor. This architecture is particularly useful in portable devices where power consumption and processing efficiency are critical.
8. The chip according to claim 1, wherein the first start pulse generating circuit is a binary start pulse generating circuit.
A binary start pulse generating circuit is used in integrated circuits to initiate timing operations with precise synchronization. The circuit generates a start pulse signal that is synchronized with a reference clock signal, ensuring accurate timing for subsequent operations. This is particularly important in high-speed digital systems where timing errors can lead to data corruption or system failures. The binary start pulse generating circuit typically includes logic gates and flip-flops configured to produce a pulse of a specific width and timing relative to the reference clock. The circuit may also include edge detection mechanisms to ensure the pulse is generated at the correct clock edge. By using a binary approach, the circuit simplifies the generation of the start pulse, reducing complexity and improving reliability. This type of circuit is commonly used in microprocessors, memory controllers, and other high-performance digital systems where precise timing is critical. The binary start pulse generating circuit may be integrated into a larger timing control module, which manages multiple timing signals within the chip. The circuit ensures that the start pulse is generated consistently, even under varying operating conditions, such as temperature fluctuations or voltage variations. This reliability is essential for maintaining system performance and stability. The binary start pulse generating circuit may also include error detection and correction mechanisms to further enhance its robustness. Overall, the binary start pulse generating circuit provides a reliable and efficient solution for generating synchronized start pulses in digital systems.
9. The chip according to claim 1, wherein each of the second number of start pulse signals has a respective logic state, the respective logic state has a plurality of logic values, and the control circuit further comprises an encoding circuit configured to encode an index number of the selected fingerprint zone as the logic values of the start pulse signals of the second number of start pulse signals.
10. The chip according to claim 1, wherein the control circuit is configured to provide different numbers of start pulse signals under different settings.
12. The chip according to claim 11, wherein the second start pulse generating circuit is a thermometer-code start pulse generating circuit or an one-hot code pulse generating circuit.
13. The chip according to claim 11, wherein the third number is equal to the first number.
A semiconductor chip includes a substrate with a first surface and a second surface, where the first surface has a first number of conductive pads and the second surface has a second number of conductive pads. The chip also includes a plurality of conductive vias extending through the substrate to electrically connect the first and second surfaces. The vias are arranged in a pattern that includes at least one via that is not aligned with any of the conductive pads on either surface. The chip further includes a third number of conductive elements on the second surface, where the third number is equal to the first number of conductive pads on the first surface. The conductive elements on the second surface are electrically connected to the conductive pads on the first surface through the conductive vias, enabling signal routing between the two surfaces. This configuration allows for flexible interconnection schemes, such as redistributing signals or power connections between the chip's front and back sides, which can be useful in advanced packaging or 3D integration applications. The equal number of conductive elements on the second surface ensures a balanced electrical interface, simplifying design and manufacturing processes.
14. The chip according to claim 11, wherein a logical state set of the second number of start pulse signals and the selected fingerprint zone have a first mapping relationship therebetween, and a logical state set of the third number of start pulse signals and the selected fingerprint zone have a second mapping relationship therebetween, wherein the first mapping relationship is different from the second mapping relationship.
15. The chip according to claim 1, wherein the second number of start pulse signals are used to be provided to a decoder disposed on the panel for the decoder to obtain the information about the selected fingerprint zone according to logic values of the second number of start pulse signals.
16. The chip according to claim 15, wherein the second number of start pulse signals are used to be provided to the decoder to provide a fourth number of start pulses each for selecting a corresponding one of the first number of fingerprint zones, wherein the fourth number is equal to the first number.
17. The chip according to claim 15, wherein the decoder comprises a plurality of decoder units each corresponding to one of the fingerprint zones.
18. The chip according to claim 17, wherein all of the second number of start pulse signals are provided to each of the decoder units.
This invention relates to integrated circuit chips, specifically addressing the distribution of start pulse signals within a decoder unit array. The problem solved is the efficient and synchronized delivery of multiple start pulse signals to decoder units, ensuring proper timing and coordination in integrated circuit operations. The chip includes a plurality of decoder units arranged in an array, where each decoder unit is configured to receive and process start pulse signals. The invention specifies that all of a second number of start pulse signals are provided to each of the decoder units. This means that every decoder unit in the array receives the same set of start pulse signals, ensuring uniform signal distribution across the array. The start pulse signals are generated by a pulse generator circuit, which may be integrated into the chip or provided externally. The decoder units decode the start pulse signals to control various operations, such as memory access, data processing, or other functions within the integrated circuit. The invention ensures that all decoder units receive the same start pulse signals, which is critical for maintaining synchronization and preventing timing discrepancies in the chip's operation. This uniform distribution is particularly important in high-performance applications where precise timing is required. The invention may be applied in various integrated circuits, including microprocessors, memory controllers, or other logic circuits where decoder units are used to manage signal processing and data flow.
19. The chip according to claim 1, wherein each of the second number of start pulse signals has a respective logic state, and a logical state set of the second number of start pulse signals and the selected fingerprint zone have a first mapping relationship therebetween.
20. The chip according to claim 19, wherein the respective logic state of each of the second number of start pulse signals has a plurality of logic values, and the selected fingerprint zone is indicated according to a mathematical formula of the logic values of the logic states of the second number of start pulse signals.
This invention relates to integrated circuit chips with fingerprint sensing capabilities, specifically addressing the challenge of efficiently selecting and processing specific zones of a fingerprint sensor array. The chip includes a fingerprint sensor array with a first number of sensing elements arranged in rows and columns, and a control circuit configured to generate a first number of start pulse signals for activating the sensing elements. The control circuit also generates a second number of start pulse signals, where the second number is less than the first number, to selectively activate a subset of the sensing elements corresponding to a fingerprint zone. Each of the second number of start pulse signals has a plurality of logic values, and the selected fingerprint zone is determined based on a mathematical formula applied to the logic values of these signals. This allows for precise and efficient zone selection without requiring individual control of each sensing element, reducing complexity and power consumption. The invention improves fingerprint sensing performance by enabling targeted activation of specific sensor regions, enhancing accuracy and processing speed.
21. The chip according to claim 20, wherein the plurality logic values comprise zero and 1, and the mathematical formula is NF=Σi=0N2−1 S_(i+1)·2i, wherein NF is an index number of the selected fingerprint zone, S_(i+1) is a logic value of an (i+1)th) start pulse signal S_(i+1), i is an integer from 0 to N2−1, and N2 is the second number.
22. The chip according to claim 1, wherein the fingerprint sensing pixels are optical fingerprint sensing pixels capable of sensing light.
23. The chip according to claim 1, wherein selection for each of the fingerprint zones depends upon all of the second number of start pulse signals.
26. The chip according to claim 25, wherein the decoder comprises a plurality of decoder units each corresponding to one of the fingerprint zones.
27. The chip according to claim 26, wherein all of the start pulse signals are provided to each of the decoder units.
28. The chip according to claim 25, wherein the start pulse signals are used for controlling the gate lines of the panel.
29. The chip according to claim 28, wherein the start pulse signals are provided to a GOA circuit of the panel configured to generate a plurality of scan signals respectively for controlling the gate lines of the panel.
This invention relates to display panel technology, specifically addressing the generation and distribution of start pulse signals in gate driver on array (GOA) circuits for controlling gate lines in display panels. The problem being solved involves efficiently providing start pulse signals to a GOA circuit, which generates scan signals to control the gate lines of the panel. The invention describes a chip that includes a timing controller configured to generate the start pulse signals. These signals are then provided to the GOA circuit, which uses them to produce the scan signals that drive the gate lines. The GOA circuit is integrated into the panel itself, reducing the need for external driver circuits and simplifying the panel design. The start pulse signals are synchronized with the timing controller to ensure proper sequencing of the scan signals, enabling accurate control of the display's pixel charging and refresh cycles. This approach improves display performance by ensuring precise timing and synchronization between the timing controller and the GOA circuit, leading to better image quality and reduced power consumption. The invention is particularly useful in modern display technologies where efficient and compact driver circuits are essential.
30. The chip according to claim 29, wherein the GOA circuit comprises a plurality of shift register groups each coupled to a corresponding one of the fingerprint zones and operating according to all of the start pulse signals.
A chip with an integrated fingerprint sensor and gate driver on array (GOA) circuit is designed to address challenges in fingerprint recognition accuracy and power efficiency. The chip includes a fingerprint sensor array divided into multiple fingerprint zones, each zone corresponding to a specific area of the sensor. The GOA circuit contains multiple shift register groups, with each group connected to a distinct fingerprint zone. These shift register groups operate in response to multiple start pulse signals, allowing synchronized or staggered activation of the fingerprint zones. This configuration enables precise control over the fingerprint sensing process, improving signal quality and reducing power consumption by activating only the necessary zones. The GOA circuit's modular design enhances flexibility in fingerprint sensor operation, supporting various scanning modes and adaptive power management. The invention aims to optimize fingerprint recognition performance while minimizing hardware complexity and energy usage.
31. The chip according to claim 29, wherein the scan signals are configured to control the corresponding fingerprint sensing pixels to perform resetting operation and/or selecting/writing operation.
32. The chip according to claim 25, wherein the selecting circuit is configured to receive the information about the selected fingerprint zone from a processor configured to determine the selected fingerprint zone according to touch information.
33. The chip according to claim 32, wherein the processor is configured to receive the touch information from a touch control circuit configured to control touch sensing on the panel.
A chip for electronic devices integrates a processor and a touch control circuit to enhance touch sensing functionality. The chip is designed for devices with touch-sensitive panels, such as smartphones, tablets, or touchscreens, where accurate and responsive touch detection is critical. The problem addressed is the need for efficient touch signal processing to improve touch accuracy, reduce latency, and minimize power consumption in touch-sensitive devices. The chip includes a processor that receives touch information from a dedicated touch control circuit. The touch control circuit is responsible for managing touch sensing operations on the panel, including detecting touch events, processing raw touch data, and transmitting the processed information to the processor. The processor then uses this data to determine touch coordinates, gestures, or other touch-related inputs, enabling the device to respond appropriately. This separation of touch sensing and processing tasks allows for optimized performance, as the touch control circuit can be specialized for low-level touch detection, while the processor handles higher-level processing and system integration. The design ensures that touch inputs are accurately captured and processed, improving user experience by reducing delays and enhancing touch responsiveness. Additionally, the dedicated touch control circuit may include features such as noise filtering, signal amplification, and power management to further enhance touch sensing efficiency. This architecture is particularly useful in devices where touch sensitivity and power efficiency are critical, such as portable or battery-powered devices.
35. The chip according to claim 34, wherein the first start pulse generating circuit is a binary start pulse generating circuit.
A binary start pulse generating circuit is used in integrated circuits to initiate timing operations with precise synchronization. The circuit generates a start pulse signal that triggers subsequent operations in a chip, ensuring accurate timing control. This type of circuit is particularly useful in digital systems where synchronization between different components is critical, such as in microprocessors, memory controllers, or communication devices. The binary start pulse generating circuit may include logic gates, flip-flops, or other digital components configured to produce a clean, well-defined pulse at the beginning of a timing sequence. By using a binary approach, the circuit ensures that the start pulse is generated in a deterministic manner, reducing jitter and improving system reliability. The circuit may also include features to adjust the pulse width or timing based on system requirements, allowing for flexibility in different applications. Overall, the binary start pulse generating circuit enhances the performance and accuracy of timing-related operations in integrated circuits.
36. The chip according to claim 34, wherein each of the start pulse signals has a respective logic state, the respective logic state has a plurality of logic values, and the control circuit further comprises an encoding circuit configured to encode an index number of the selected fingerprint zone as the logic values of the start pulse signals.
37. The chip according to claim 34, wherein the control circuit is configured to provide different numbers of start pulse signals under different settings.
39. The chip according to claim 38, wherein the second start pulse generating circuit is a thermometer-code start pulse generating circuit or an one-hot code pulse generating circuit.
40. The chip according to claim 38, wherein the third number is equal to the first number.
41. The chip according to claim 38, wherein a logical state set of the second number of start pulse signals and the selected fingerprint zone have a first mapping relationship therebetween, and a logical state set of the third number of start pulse signals and the selected fingerprint zone have a second mapping relationship therebetween, wherein the first mapping relationship is different from the second mapping relationship.
42. The chip according to claim 38, wherein the second number of start pulse signals are used to be provided to the decoder disposed on the panel for the decoder to obtain the information about the selected fingerprint zone according to logic values of the second number of start pulse signals.
43. The chip according to claim 42, wherein the second number of start pulse signals are used to be provided to the decoder to provide a fourth number of start pulses each for selecting a corresponding one of the first number of fingerprint zones, wherein the fourth number is equal to the first number.
44. The chip according to claim 25, wherein each of the start pulse signals has a respective logic state, and a logical state set of the start pulse signals and the selected fingerprint zone have a first mapping relationship therebetween.
45. The chip according to claim 44, wherein the respective logic state of each of the start pulse signals has a plurality of logic values, and the selected fingerprint zone is indicated according to a mathematical formula of the logic values of the logic states of the start pulse signals.
46. The chip according to claim 45, wherein a total number of the start pulse signals is equal to a second number, and the first number is greater than the second number.
47. The chip according to claim 46, wherein the plurality logic values comprise zero and 1, and the mathematical formula is NF=Σi=0N2−1 S_(i+1)·2i, wherein NF is an index number of the selected fingerprint zone, S_(i+1) is a logic value of an (i+1)th) start pulse signal S_(i+1), i is an integer from 0 to N2−1, and N2 is the second number.
48. The chip according to claim 25, wherein the fingerprint sensing pixels are optical fingerprint sensing pixels capable of sensing light.
This invention relates to an integrated circuit chip with optical fingerprint sensing pixels for capturing fingerprint images. The chip includes an array of optical fingerprint sensing pixels that detect light reflected from a user's fingerprint to generate a high-resolution fingerprint image. The optical sensing pixels convert incident light into electrical signals, which are processed to reconstruct the fingerprint pattern. The chip may also include additional circuitry for signal amplification, noise reduction, and image processing to enhance the clarity and accuracy of the captured fingerprint data. The optical sensing pixels are designed to operate in various lighting conditions, ensuring reliable fingerprint detection. The chip may further incorporate advanced algorithms for fingerprint recognition, matching, and authentication, enabling secure biometric identification. The optical fingerprint sensing technology provides a non-invasive and efficient method for capturing detailed fingerprint images, suitable for applications in mobile devices, security systems, and access control. The invention addresses the need for improved fingerprint sensing accuracy, speed, and reliability in electronic devices.
49. The chip according to claim 25, wherein selection for each of the fingerprint zones depends upon all of the start pulse signals.
52. The electronic device according to claim 51, wherein the first GOA circuit comprises a plurality of shift register groups each coupled to a corresponding one of the fingerprint zones and operating according to all of the second number of start pulse signals.
53. The electronic device according to claim 51, wherein the start pulse signals are used for controlling the first gate lines of the panel.
54. The electronic device according to claim 53, wherein the start pulse signals are provided to the first GOA circuit of the panel configured to generate a plurality of scan signals respectively for controlling the first gate lines of the panel.
55. The electronic device according to claim 54, wherein the scan signals are configured to control the corresponding fingerprint sensing pixels to perform resetting operation and/or selecting/writing operation.
This invention relates to electronic devices with fingerprint sensing capabilities, specifically addressing the control of fingerprint sensing pixels through scan signals. The technology aims to improve the functionality and efficiency of fingerprint sensors by enabling precise control over the operations of individual sensing pixels. The problem being solved involves the need for flexible and efficient management of pixel operations in fingerprint sensors, such as resetting, selecting, and writing data, to enhance accuracy and performance. The electronic device includes a fingerprint sensor with an array of fingerprint sensing pixels. Each pixel is controlled by scan signals that dictate its operational state. These scan signals are configured to perform specific functions, including resetting the pixel to clear previous data, selecting the pixel for reading or writing operations, and writing data to the pixel. The scan signals ensure that each pixel operates independently and in synchronization with the overall sensor array, allowing for accurate fingerprint detection and processing. The invention enhances the adaptability and efficiency of fingerprint sensors by providing granular control over pixel operations, improving the sensor's responsiveness and reliability. This approach is particularly useful in applications requiring high-resolution fingerprint imaging, such as biometric authentication systems.
56. The electronic device according to claim 51, wherein the selecting circuit is configured to receive the information about the selected fingerprint zone from a processor configured to determine the selected fingerprint zone according to touch information.
Fingerprint recognition systems often face challenges in accurately capturing and processing fingerprint data, particularly when dealing with partial or low-quality inputs. This invention addresses these issues by improving the selection of fingerprint zones for enhanced recognition accuracy. The device includes a selecting circuit that dynamically chooses a specific fingerprint zone based on touch information. A processor analyzes touch data to determine the optimal zone, ensuring that the most relevant fingerprint region is captured for authentication. This adaptive selection process helps mitigate errors caused by partial touches or suboptimal fingerprint placement, improving overall recognition performance. The system integrates seamlessly with existing fingerprint sensors, enhancing reliability without requiring significant hardware modifications. By leveraging touch feedback to guide zone selection, the invention ensures more consistent and accurate fingerprint matching, particularly in scenarios where users may not place their finger perfectly on the sensor. This approach is particularly useful in mobile devices, security systems, and other applications where fingerprint authentication is critical. The dynamic zone selection mechanism optimizes the recognition process, reducing false rejections and improving user experience.
57. The electronic device according to claim 56, wherein the processor is configured to receive the touch information from a touch control circuit configured to control touch sensing on the panel.
58. The electronic device according to claim 51, wherein the first start pulse generating circuit is a binary start pulse generating circuit.
59. The electronic device according to claim 51, wherein each of the second number of start pulse signals has a respective logic state, the respective logic state has a plurality of logic values, and the control circuit further comprises an encoding circuit configured to encode an index number of the selected fingerprint zone as the logic values of the start pulse signals of the second number of start pulse signals.
60. The electronic device according to claim 51, wherein the control circuit is configured to provide different numbers of start pulse signals under different settings.
62. The electronic device according to claim 61, wherein the second start pulse generating circuit is a thermometer-code start pulse generating circuit or an one-hot code pulse generating circuit.
63. The electronic device according to claim 61, wherein the third number is equal to the first number.
64. The electronic device according to claim 61, wherein a logical state set of the second number of start pulse signals and the selected fingerprint zone have a first mapping relationship therebetween, and a logical state set of the third number of start pulse signals and the selected fingerprint zone have a second mapping relationship therebetween, wherein the first mapping relationship is different from the second mapping relationship.
65. The electronic device according to claim 61, wherein the first GOA circuit comprises a decoder and the second number of start pulse signals are used to be provided to the decoder disposed on the panel for the decoder to obtain the information about the selected fingerprint zone according to logic values of the second number of start pulse signals.
66. The electronic device according to claim 65, wherein the second number of start pulse signals are used to be provided to the decoder to provide a fourth number of start pulses each for selecting a corresponding one of the first number of fingerprint zones, wherein the fourth number is equal to the first number.
67. The electronic device according to claim 66, wherein the first GOA circuit further comprises a plurality of shift registers coupled between the decoder and the fingerprint zones.
The invention relates to electronic devices with integrated fingerprint sensing capabilities, specifically addressing the challenge of efficiently routing signals between a decoder and multiple fingerprint sensing zones. The device includes a gate driver on array (GOA) circuit that incorporates a plurality of shift registers. These shift registers are positioned between a decoder and the fingerprint zones, facilitating precise control and signal distribution to the sensing areas. The GOA circuit is designed to manage the timing and activation of the fingerprint zones, ensuring accurate and reliable fingerprint detection. The shift registers enable sequential or selective activation of the zones based on signals received from the decoder, optimizing power consumption and performance. This configuration enhances the integration of fingerprint sensing functionality within the display or touch-sensitive surface of the device, improving both security and user interaction efficiency. The invention aims to streamline the hardware design by consolidating signal routing and control components, reducing complexity and cost while maintaining high sensing accuracy. The shift registers may be configured to handle various signal types, including clock, data, or control signals, depending on the specific requirements of the fingerprint sensing system. This approach is particularly useful in devices where space and power efficiency are critical, such as smartphones, tablets, or wearable electronics.
68. The electronic device according to claim 65, wherein the decoder comprises a plurality of decoder units each corresponding to one of the fingerprint zones.
69. The electronic device according to claim 68, wherein all of the second number of start pulse signals are provided to each of the decoder units.
70. The electronic device according to claim 51, wherein each of the second number of start pulse signals has a respective logic state, and a logical state set of the second number of start pulse signals and the selected fingerprint zone have a first mapping relationship therebetween.
71. The electronic device according to claim 70, wherein the respective logic state of each of the second number of start pulse signals has a plurality of logic values, and the selected fingerprint zone is indicated according to a mathematical formula of the logic values of the logic states of the second number of start pulse signals.
72. The electronic device according to claim 71, wherein the plurality logic values comprise zero and 1, and the mathematical formula is NF=Σi=0N2−1 S_(i+1)·2i, wherein NF is an index number of the selected fingerprint zone, S_(i+1) is a logic value of an (i+1)th) start pulse signal S_(i+1), i is an integer from 0 to N2−1, and N2 is the second number.
73. The electronic device according to claim 51, wherein the fingerprint sensing pixels are optical fingerprint sensing pixels capable of sensing light.
74. The electronic device according to claim 51, wherein the first gate on array (GOA) circuit is configured to receive the first control signals from the chip and generate a plurality of first scan signals respectively for controlling the first gate lines of the panel.
The invention relates to electronic devices incorporating gate-on-array (GOA) circuits for driving display panels, particularly addressing challenges in signal control and synchronization between integrated circuits and display panels. The device includes a panel with multiple gate lines and a chip that generates control signals. A first GOA circuit is integrated within the panel and receives these control signals from the chip. The GOA circuit processes the control signals to generate multiple scan signals, each corresponding to a specific gate line in the panel. These scan signals are used to control the activation of the gate lines, enabling the sequential driving of display elements. The GOA circuit's integration within the panel reduces the need for external driving components, simplifying the device's structure and improving space efficiency. The control signals from the chip ensure synchronized operation between the panel and the chip, enhancing display performance and reliability. This configuration is particularly useful in modern display technologies where compact and efficient driving solutions are required.
75. The electronic device according to claim 74, wherein the first GOA circuit comprises a decoder, configured to decode the start pulse signals to obtain information about the selected fingerprint zone.
The invention relates to electronic devices with fingerprint recognition capabilities, specifically addressing the challenge of efficiently selecting and processing specific fingerprint zones for improved accuracy and power management. The device includes a gate driver on array (GOA) circuit that controls the activation of fingerprint sensing elements. The GOA circuit incorporates a decoder that processes start pulse signals to determine which fingerprint zone is selected for scanning. This allows the device to selectively activate only the relevant sensing elements corresponding to the targeted fingerprint zone, reducing unnecessary power consumption and processing overhead. The decoder interprets the start pulse signals to extract zone selection information, enabling precise control over the fingerprint sensing process. This selective activation mechanism enhances the device's ability to focus on specific areas of the fingerprint, improving recognition accuracy while optimizing energy efficiency. The overall system integrates the GOA circuit with the fingerprint sensor array, ensuring coordinated operation between the decoding logic and the sensing elements to achieve efficient and accurate fingerprint scanning.
77. The electronic device according to claim 76, wherein the chip further comprises a display control circuit configured to generate the second control signals.
78. The electronic device according to claim 51, wherein selection for each of the fingerprint zones depends upon all of the second number of start pulse signals.
81. The electronic device according to claim 80, wherein the first GOA circuit comprises a plurality of shill register groups each coupled to a corresponding one of the fingerprint zones and operating according to all of the start pulse signals.
82. The electronic device according to claim 80, wherein the decoder comprises a plurality of decoder units each corresponding one of the fingerprint zones.
83. The electronic device according to claim 82, wherein all of the start pulse signals are provided to each of the decoder units.
The invention relates to electronic devices, specifically those involving signal distribution in decoder units. The problem addressed is the efficient and synchronized distribution of start pulse signals to multiple decoder units within an electronic device. Traditional systems may suffer from delays, synchronization issues, or inefficient routing of these signals, which can degrade performance. The invention provides an electronic device with a plurality of decoder units, where all start pulse signals are uniformly provided to each decoder unit. This ensures that every decoder unit receives the same set of start pulse signals simultaneously, eliminating timing discrepancies and improving synchronization. The start pulse signals are likely used to initiate or control operations within the decoder units, such as data processing, decoding, or timing synchronization. By distributing all start pulse signals to each decoder unit, the system ensures consistent and reliable operation across all units, which is critical for applications requiring precise timing, such as digital signal processing, communication systems, or multimedia devices. The invention enhances performance by reducing latency and improving coordination between decoder units.
84. The electronic device according to claim 80, wherein the start pulse signals are used for controlling the first gate lines of the panel.
The invention relates to electronic devices, specifically those incorporating display panels with gate line control mechanisms. The problem addressed is the efficient and precise control of gate lines in display panels, particularly in devices where multiple gate lines must be activated in a coordinated manner to ensure proper display functionality. The electronic device includes a display panel with a plurality of gate lines, where the gate lines are divided into at least two groups. The device generates start pulse signals that are used to control the first group of gate lines. These start pulse signals initiate the activation of the gate lines, ensuring that the display panel operates correctly by sequentially enabling the appropriate gate lines at the right time. The device may also include additional control mechanisms, such as a gate driver circuit, to manage the timing and distribution of these start pulse signals across the panel. The invention ensures that the display panel operates with high precision, reducing errors in gate line activation and improving overall display performance. The use of start pulse signals for controlling the first group of gate lines allows for better synchronization and coordination between different parts of the display panel, enhancing the reliability and efficiency of the device.
85. The electronic device according to claim 84, wherein the start pulse signals are provided to the first GOA circuit of the panel configured to generate a plurality of scan signals respectively for controlling the first gate lines of the panel.
86. The electronic device according to claim 85, wherein the scan signals are configured to control the corresponding fingerprint sensing pixels to perform resetting operation and/or selecting/writing operation.
88. The electronic device according to claim 87, wherein the selecting circuit is configured to receive the information about the selected fingerprint zone from a processor configured to determine the selected fingerprint zone according to touch information.
89. The electronic device according to claim 88, wherein the processor is configured to receive the touch information from a touch control circuit configured to control touch sensing on the panel.
The invention relates to electronic devices with touch-sensitive panels, addressing the need for efficient touch input processing. The device includes a processor and a touch control circuit that manages touch sensing on a panel. The processor receives touch information from the touch control circuit, which detects and processes touch inputs on the panel. The touch control circuit may include hardware or firmware components that convert raw touch signals into structured data, such as touch coordinates, pressure levels, or gesture recognition. The processor then uses this information to execute commands, adjust display outputs, or interact with software applications. The system ensures accurate and responsive touch input handling, improving user experience in devices like smartphones, tablets, or touchscreen interfaces. The touch control circuit may also include calibration or noise filtering to enhance touch detection accuracy. The invention focuses on optimizing the communication between the touch control circuit and the processor to streamline touch input processing and reduce latency.
91. The electronic device according to claim 90, wherein the first start pulse generating circuit is a binary start pulse generating circuit.
92. The electronic device according to claim 90, wherein each of the start pulse signals has a respective logic state, the respective logic state has a plurality of logic values, and the control circuit further comprises an encoding circuit configured to encode an index number of the selected fingerprint zone as the logic values of the start pulse signals.
The invention relates to electronic devices with fingerprint sensing capabilities, specifically addressing the challenge of efficiently selecting and processing specific fingerprint zones for authentication or identification. The device includes a fingerprint sensor array divided into multiple zones, each capable of capturing fingerprint data. A control circuit generates start pulse signals to activate selected zones, where each start pulse signal has a logic state with multiple logic values. An encoding circuit within the control circuit encodes an index number corresponding to the selected fingerprint zone into the logic values of the start pulse signals. This encoding allows the device to uniquely identify and activate specific zones, improving the efficiency and accuracy of fingerprint data acquisition. The system ensures that only the relevant zones are processed, reducing computational overhead and power consumption while maintaining high-resolution fingerprint sensing. The encoded start pulse signals enable precise control over zone selection, enhancing the device's ability to handle large fingerprint areas or multi-zone authentication scenarios.
93. The electronic device according to claim 90, wherein the control circuit is configured to provide different numbers of start pulse signals under different settings.
95. The electronic device according to claim 94, wherein the second start pulse generating circuit is a thermometer-code start pulse generating circuit or an one-hot code pulse generating circuit.
This invention relates to electronic devices, specifically those incorporating pulse generating circuits for timing or control purposes. The problem addressed is the need for precise and efficient pulse generation in electronic systems, particularly in applications requiring high-speed or low-power operation. The invention describes an electronic device with a pulse generating system that includes at least two start pulse generating circuits. The first circuit generates a start pulse based on an input signal, while the second circuit generates a start pulse using either a thermometer-code or one-hot code scheme. Thermometer-code circuits produce pulses where only one output is active at a time, ensuring minimal glitches and power consumption. One-hot code circuits similarly generate pulses with a single active output, but with a different encoding method, offering flexibility in design. The device may also include a pulse width control circuit that adjusts the width of the generated pulses based on a control signal, allowing for dynamic pulse shaping. Additionally, a pulse output circuit may be present to combine or modify the pulses from the start pulse generating circuits before outputting them. The system ensures precise timing and efficient power usage, making it suitable for applications like digital signal processing, clock generation, or power management in integrated circuits. The use of thermometer-code or one-hot code schemes enhances reliability and reduces noise in pulse generation.
96. The electronic device according to claim 94, wherein the third number is equal to the first number.
The invention relates to electronic devices with improved data processing capabilities, particularly for systems requiring precise numerical comparisons or validations. The problem addressed involves ensuring accurate and efficient handling of numerical values in electronic devices, where discrepancies between expected and actual values can lead to errors in computations, data integrity issues, or system malfunctions. The electronic device includes a processor configured to perform operations involving three numerical values: a first number, a second number, and a third number. The processor compares the second number to the first number and, based on this comparison, determines whether the third number should be adjusted. Specifically, if the second number is greater than the first number, the processor modifies the third number to equal the first number. This adjustment ensures that the third number remains consistent with the first number, preventing potential errors in subsequent processing steps. The device may also include a memory for storing the numerical values and a display for presenting results or status updates. The processor may further execute additional operations, such as generating alerts or triggering corrective actions if the third number deviates from the first number. This mechanism enhances reliability in applications where numerical consistency is critical, such as financial transactions, scientific measurements, or control systems. The invention improves system accuracy by enforcing strict numerical relationships between key values.
97. The electronic device according to claim 94, wherein a logical state set of the second number of start pulse signals and the selected fingerprint zone have a first mapping relationship therebetween, and a logical state set of the third number of start pulse signals and the selected fingerprint zone have a second mapping relationship therebetween, wherein the first mapping relationship is different from the second mapping relationship.
This invention relates to electronic devices with fingerprint sensing capabilities, specifically addressing the challenge of efficiently activating and managing multiple fingerprint sensing zones. The device includes a fingerprint sensor configured to detect fingerprint data from a selected zone of a fingerprint sensing area. The sensor generates a first set of start pulse signals to activate a first number of fingerprint sensing zones and a second set of start pulse signals to activate a second number of fingerprint sensing zones. The logical state sets of these start pulse signals are mapped to the selected fingerprint zone, with the first mapping relationship differing from the second mapping relationship. This ensures that the device can dynamically adjust the activation of sensing zones based on the selected area, optimizing power consumption and processing efficiency. The invention also includes a control circuit that generates the start pulse signals and a processing circuit that processes the detected fingerprint data. The different mapping relationships allow the device to adapt to varying sensing requirements, improving accuracy and responsiveness. The system ensures that only the necessary zones are activated, reducing unnecessary power usage while maintaining high-performance fingerprint recognition.
98. The electronic device according to claim 90, wherein the first GOA circuit further comprises the decoder and the second number of start pulse signals are used to be provided to the decoder disposed on the panel for the decoder to obtain the information about the selected fingerprint zone according to logic values of the second number of start pulse signals.
99. The electronic device according to claim 98, wherein the second number of start pulse signals are used to be provided to the decoder to provide a fourth number of start pulses each for selecting a corresponding one of the first number of fingerprint zones, wherein the fourth number is equal to the first number.
The invention relates to electronic devices with fingerprint sensing capabilities, specifically addressing the challenge of efficiently selecting and processing multiple fingerprint zones for improved accuracy and performance. The device includes a fingerprint sensor configured to capture fingerprint data from a first number of distinct fingerprint zones. A decoder receives a second number of start pulse signals and generates a fourth number of start pulses, where the fourth number equals the first number. Each start pulse corresponds to a specific fingerprint zone, enabling precise selection and activation of the zones for data acquisition. The decoder ensures synchronized and controlled activation of the zones, enhancing the device's ability to process fingerprint data accurately. This approach optimizes the fingerprint sensing process by dynamically managing zone selection, improving both speed and reliability in biometric authentication. The system may also include additional components, such as a controller and a memory, to further refine the fingerprint data processing workflow. The invention aims to provide a robust and efficient method for handling multiple fingerprint zones in electronic devices, particularly in applications requiring high-security biometric verification.
100. The electronic device according to claim 99, wherein the first GOA circuit further comprises a plurality of shift registers coupled between the decoder and the fingerprint zones.
101. The electronic device according to claim 80, wherein each of the start pulse signals has a respective logic state, and a logical state set of the start pulse signals and the selected fingerprint zone have a first mapping relationship therebetween.
102. The electronic device according to claim 101, wherein the respective logic state of each of the start pulse signals has a plurality of logic values, and the selected fingerprint zone is indicated according to a mathematical formula of the logic values of the logic states of the start pulse signals.
103. The electronic device according to claim 102, wherein a total number of the start pulse signals is equal to a second number, wherein the first number is greater than the second number.
104. The electronic device according to claim 101, wherein the plurality logic values comprise zero and 1, and the mathematical formula is NF=Σi=0N2−1 S_(i+1)·2i, wherein NF is an index number of the selected fingerprint zone, S_(i+1) is a logic value of an (i+1)th) start pulse signal S_(i+1), i is an integer from 0 to N2−1, and N2 is the second number.
This invention relates to electronic devices that use fingerprint recognition, specifically focusing on a method for selecting a fingerprint zone based on a mathematical formula. The problem addressed is efficiently determining a specific fingerprint zone from multiple zones using a set of logic values derived from start pulse signals. The device generates a plurality of start pulse signals, each having a logic value of either 0 or 1. These logic values are processed using a mathematical formula to calculate an index number (NF) corresponding to a selected fingerprint zone. The formula is NF=Σi=0N2−1 S_(i+1)·2i, where NF is the index number, S_(i+1) is the logic value of the (i+1)th start pulse signal, i is an integer ranging from 0 to N2−1, and N2 is the total number of start pulse signals. The device then selects the fingerprint zone based on this calculated index number. This approach ensures precise and efficient zone selection in fingerprint recognition systems, improving accuracy and processing speed. The invention is particularly useful in biometric authentication systems where rapid and reliable fingerprint analysis is required.
105. The electronic device according to claim 80, wherein the fingerprint sensing pixels are optical fingerprint sensing pixels capable of sensing light.
106. The electronic device according to claim 80, wherein the first GOA circuit is configured to receive the first control signals from the chip and generate a plurality of first scan signals respectively for controlling the first gate lines.
107. The electronic device according to claim 106, wherein the first GOA circuit comprises a decoder, configured to decode the start pulse signals to obtain information about the selected fingerprint zone.
109. The electronic device according to claim 108, wherein the chip further comprises a display control circuit configured to generate the second control signals.
110. The electronic device according to claim 80, wherein selection for each of the fingerprint zones depends upon all of the start pulse signals.
113. The panel according to claim 112, wherein the scan signals are configured to control the corresponding fingerprint sensing pixels to perform resetting operation and/or selecting/writing operation.
114. The panel according to claim 112, wherein the first GOA circuit comprises a plurality of shift register groups each coupled to a corresponding one of the fingerprint zones and operating according to all of the start pulse signals.
116. The panel according to claim 112, wherein the fingerprint sensing pixels are optical fingerprint sensing pixels capable of sensing light.
This invention relates to a panel with integrated optical fingerprint sensing pixels designed to enhance security and user authentication in electronic devices. The panel includes a display area and a fingerprint sensing area, where the fingerprint sensing pixels are embedded within the display area to provide seamless integration. The optical fingerprint sensing pixels are capable of detecting light, allowing for accurate and reliable fingerprint recognition. The panel may also include a touch sensing layer to enable touch input functionality alongside fingerprint sensing. The optical fingerprint sensing pixels operate by capturing light reflections from a user's fingerprint, converting these reflections into electrical signals that are processed to generate a fingerprint image. This design eliminates the need for a separate fingerprint sensor, reducing device thickness and improving aesthetics. The panel may further include additional layers, such as a color filter layer, to enhance display performance while maintaining fingerprint sensing accuracy. The optical sensing mechanism ensures high-resolution fingerprint detection, making it suitable for secure authentication in smartphones, tablets, and other electronic devices. The integration of optical fingerprint sensing within the display area provides a compact and user-friendly solution for biometric authentication.
117. The panel according to claim 112, wherein the decoder is configured to receive a second number of start pulse signal and to provide a third number of start pulses each for selecting a corresponding one of the first number of fingerprint zones, wherein the second number is greater than the first number and the third number is equal to the first number.
118. The panel according to claim 117, wherein the first GOA circuit further comprises a plurality of shift registers coupled between the decoder and the fingerprint zones.
119. The panel according to claim 117, wherein the decoder comprises a plurality of decoder units each corresponding one of the fingerprint zones.
120. The panel according to claim 119, wherein all of the start pulse signals are provided to each of the decoder units.
121. The panel according to claim 112, wherein selection for each of the fingerprint zones depends upon all of the start pulse signals.
This invention relates to a panel with fingerprint recognition capabilities, specifically addressing the challenge of accurately selecting fingerprint zones for sensing based on multiple input signals. The panel includes a plurality of fingerprint zones, each configured to detect fingerprint data. The selection of each fingerprint zone for sensing is determined by analyzing all of the start pulse signals received by the panel. These start pulse signals may originate from various sources, such as user interactions or system triggers, and are used to dynamically adjust which fingerprint zones are activated. The panel may also include a controller that processes the start pulse signals to determine the optimal zones for sensing, ensuring efficient and accurate fingerprint recognition. The system may further incorporate additional features, such as a display layer or a touch-sensitive layer, to enhance functionality. The invention aims to improve the reliability and responsiveness of fingerprint recognition by dynamically selecting zones based on comprehensive signal analysis, reducing errors and improving user experience.
123. The decoder according to claim 122, wherein the decoder units have identical circuit structures and the input terminals of the decoder units have different coupling relationships with the first plurality of start pulse signals.
A decoder system is designed to process multiple start pulse signals for use in display driving circuits, such as those in organic light-emitting diode (OLED) displays. The problem addressed is the need for efficient and scalable decoding of multiple start pulse signals to control display operations, such as scan line activation, while minimizing circuit complexity and power consumption. The decoder system includes multiple decoder units, each having identical circuit structures. This uniformity simplifies manufacturing and reduces design complexity. The input terminals of these decoder units are configured with different coupling relationships to a first set of start pulse signals. This variation in coupling allows each decoder unit to respond uniquely to the input signals, enabling selective activation of different output channels. The identical circuit structures ensure consistent performance across all decoder units, while the varied coupling relationships provide the necessary flexibility to decode multiple signals without requiring distinct hardware for each decoding task. This approach optimizes resource usage and improves scalability for large-scale display applications.
124. The decoder according to claim 122, wherein each of the second plurality of start pulse signals is used by a GOA circuit to generate a plurality of scan signals for controlling the fingerprint sensing pixels.
125. The decoder according to claim 122, wherein the panel further comprises a plurality of gate lines coupled to the fingerprint sensing pixels, and the each of the start pulse signals is used to generate a plurality of scan signals for controlling the gate lines coupled to the fingerprint sensing pixels.
126. The decoder according to claim 122, wherein the panel further comprises a plurality of shift register groups coupled to corresponding fingerprint sensing pixels, and each of the second plurality of start pulse signals is provided to a corresponding one of the shift register groups.
127. The decoder according to claim 122, wherein the fingerprint sensing pixels are divided into a plurality of fingerprint zones and each of the second plurality of start pulse signals corresponds to one of the fingerprint zones.
128. The decoder according to claim 122, wherein a total number of the first plurality of start pulse signals is smaller than a total number of the second plurality of start pulse signals.
130. The decoder according to claim 129, wherein the plurality of first logic units are connected in cascade, and a specific one of the first logic units has an output terminal coupled to the output terminal of the decoder unit.
This invention relates to a decoder circuit designed for efficient signal processing in digital systems. The problem addressed is the need for a compact and scalable decoder architecture that minimizes signal propagation delays and reduces power consumption while maintaining high reliability. The decoder includes a plurality of first logic units arranged in a cascaded configuration, where each unit processes input signals and generates intermediate outputs. A specific one of these first logic units is directly connected to the output terminal of the decoder unit, allowing for direct signal transmission without additional intermediate stages. This cascaded structure enables parallel processing of multiple input signals, improving throughput and reducing latency. The direct coupling of a selected first logic unit to the decoder output ensures fast response times and minimizes signal degradation. The decoder unit itself generates control signals that determine the operational state of the first logic units, enabling dynamic reconfiguration of the circuit for different processing tasks. This modular design allows for easy scalability, as additional first logic units can be added to the cascade without redesigning the entire system. The invention is particularly useful in applications requiring high-speed data decoding, such as digital communication systems, memory controllers, and signal processing circuits. The cascaded architecture and direct coupling mechanism enhance performance while maintaining low power consumption and high reliability.
133. The decoder according to claim 129, wherein all output terminals of the first logic units are coupled together to the output terminal of the decoder unit.
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August 28, 2020
October 4, 2022
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