Disclosed are a storage device and a method for sudden power off recovery thereof. The method includes: performing a first snapshot operation on the storage device to obtain system information, and storing the system information and a first tag into a non-volatile memory when the storage device in an idle state; performing a second snapshot operation on the storage device to obtain system information of the storage device, and storing the system information and a second tag into the non-volatile memory when at least one of the following conditions occurring: updating a logical-to-physical mapping table in the non-volatile memory, executing a garbage collection operation, and programming a new block; searching the latest system information in the non-volatile memory when recovering supply of power; when determining that the searched system information includes the first tag, performing a lightweight sudden power off recovery operation in the storage device.
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2. The method according to claim 1, wherein the formal SPOR operation comprises: parsing the logical-to-physical mapping table in the non-volatile memory, and scanning data information of all blocks in the non-volatile memory based on the searched system information to recover the logical-to-physical mapping table in the non-volatile memory.
This invention relates to data recovery in non-volatile memory systems, specifically addressing the challenge of reconstructing a logical-to-physical mapping table after a system failure or power loss. The method involves a formal SPOR (System Power-On Recovery) operation to restore the mapping table, which is critical for accessing stored data. The process begins by parsing the logical-to-physical mapping table stored in the non-volatile memory. The system then scans data information across all memory blocks, using pre-stored system information to identify and recover the mapping table. This ensures that the logical addresses can be correctly translated to physical addresses, enabling proper data retrieval. The method is designed to handle scenarios where the mapping table may be corrupted or incomplete, providing a reliable recovery mechanism to maintain data integrity and system functionality. The approach leverages the non-volatile memory's persistent storage capabilities to reconstruct the mapping table without requiring external intervention, improving system robustness and reliability.
3. The method according to claim 2, wherein the system information comprises: a cached mapping table (CMT) in the volatile memory, the data information of each block in the non-volatile memory, and the location of the currently programmed block in the non-volatile memory.
This invention relates to a method for managing data in a storage system that includes both volatile and non-volatile memory. The system addresses the challenge of efficiently tracking and accessing data stored in non-volatile memory, particularly in scenarios where the system must quickly retrieve or update data while minimizing latency and ensuring data integrity. The method involves maintaining a cached mapping table (CMT) in volatile memory, which stores mappings between logical addresses and physical addresses of data blocks in non-volatile memory. The CMT allows for fast lookups and updates, reducing the need for frequent access to slower non-volatile memory. Additionally, the system tracks the data information of each block in non-volatile memory, including metadata such as block status, wear level, and error correction information. This metadata helps in managing the lifecycle of the storage blocks, ensuring optimal performance and reliability. The system also monitors the location of the currently programmed block in non-volatile memory, which is the block where new data is being written. By tracking this information, the system can efficiently manage write operations, ensuring that data is written to the correct block and that the system remains aware of the latest write location. This is particularly useful in systems where data is written sequentially or where wear leveling is employed to distribute writes evenly across the non-volatile memory. The combination of the CMT, block data information, and current block location enables the system to perform fast data access, efficient write operations, and reliable data management, improving overall system performance and durability.
4. The method according to claim 1, wherein the lightweight SPOR operation comprises: acquiring and parsing data information of the currently programmed block based on data information of each block in the non-volatile memory and a location of the currently programmed block in the searched system information; and loading a cached mapping table (CMT) in the searched system information into the volatile memory.
5. The method according to claim 4, wherein the searched system information comprises the CMT stored in the volatile memory.
A method for managing system information in a computing environment involves retrieving and processing configuration and management tables (CMT) stored in volatile memory. The CMT contains critical system data, such as hardware configurations, firmware settings, and operational parameters, which are essential for system diagnostics, maintenance, and performance optimization. The method ensures that this volatile memory-stored CMT is accurately accessed, parsed, and utilized to support system operations, even in scenarios where persistent storage may be unavailable or unreliable. By leveraging the CMT from volatile memory, the system can dynamically adjust configurations, troubleshoot issues, and maintain operational integrity without relying on slower or less accessible storage solutions. This approach enhances system responsiveness and reliability, particularly in environments where rapid access to configuration data is critical. The method may also include validating the integrity of the CMT data to prevent errors or corruption, ensuring that the system operates with accurate and up-to-date information. This technique is particularly useful in embedded systems, industrial control systems, and other applications where real-time access to system information is essential for proper functioning.
9. The recovering method according to claim 1, wherein a time required to perform the lightweight SPOR operation is less than the time required to perform the formal SPOR operation.
11. The storage device according to claim 10, wherein the formal SPOR operation comprises: parsing the logical-to-physical mapping table in the non-volatile memory, and scanning data information of all blocks in the non-volatile memory based on the searched system information to recover the logical-to-physical mapping table in the non-volatile memory.
A storage device includes a non-volatile memory and a controller configured to perform a system power-on recovery (SPOR) operation. The SPOR operation is triggered during a power-on event to restore system information stored in the non-volatile memory. The system information includes a logical-to-physical mapping table that maps logical addresses to physical addresses in the non-volatile memory. During the SPOR operation, the controller parses the logical-to-physical mapping table stored in the non-volatile memory. The controller then scans data information of all blocks in the non-volatile memory based on the system information to recover the logical-to-physical mapping table. This ensures that the mapping table is accurately restored, allowing the storage device to resume normal operation with correct address translations. The recovery process is essential for maintaining data integrity and system functionality after unexpected power loss or other disruptions. The storage device may further include additional components such as a volatile memory for temporary data storage and a host interface for communication with external devices. The controller executes firmware instructions to manage data storage, retrieval, and recovery operations.
12. The storage device according to claim 11, wherein the system information comprises: a cached mapping table (CMT) in the volatile memory, the data information of each block in the non-volatile memory, and the location of the currently programmed block in the non-volatile memory.
13. The storage device according to claim 10, wherein the lightweight SPOR operation comprises: acquiring and parsing data information of the currently programmed block based on data information of each block in the non-volatile memory and a location of the currently programmed block in the searched system information; and loading a cached mapping table (CMT) in the searched system information into the volatile memory.
14. The storage device according to claim 13, wherein the searched system information comprises the CMT stored in the volatile memory.
A storage device includes a controller and a non-volatile memory storing system information, such as a command management table (CMT), which is loaded into a volatile memory during operation. The controller monitors the system information in the volatile memory to detect errors, such as data corruption or inconsistencies. When an error is detected, the controller performs a recovery process to restore the system information from the non-volatile memory to the volatile memory. The recovery process may involve validating the system information in the non-volatile memory, correcting errors if possible, and reloading the corrected data into the volatile memory. The storage device may also include a backup mechanism to periodically save the system information from the volatile memory to the non-volatile memory, ensuring data integrity and minimizing downtime in case of errors. This system is particularly useful in storage devices where system information must remain accurate and available for reliable operation.
15. The storage device according to claim 10, wherein the processor is configured to perform a third snapshot operation on the storage device to obtain system information of the storage device, and write the system information and a third tag into the non-volatile memory, when the processor receives a power-off instruction from a host.
18. The storage device according to claim 10, wherein a time required to perform the lightweight SPOR operation is less than the time required to perform the formal SPOR operation.
The invention relates to storage devices, specifically addressing the need for efficient and secure data sanitization. The technology focuses on implementing a lightweight Secure Purge of Remanence (SPOR) operation that is faster than a formal SPOR operation while still ensuring data security. The storage device includes a controller configured to perform both lightweight and formal SPOR operations. The lightweight SPOR operation is designed to be completed in less time than the formal SPOR operation, making it suitable for scenarios where quick data sanitization is required without compromising security. The formal SPOR operation, being more thorough, may involve additional steps or longer processing times to ensure complete data erasure. The controller manages these operations, ensuring that the storage device can switch between the two modes based on operational requirements. This dual-operation capability enhances flexibility in data management, allowing for both rapid and comprehensive data sanitization as needed. The invention aims to optimize storage device performance by reducing the time required for data erasure while maintaining security standards.
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January 25, 2021
October 11, 2022
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