Patentable/Patents/US-11481336
US-11481336

Host assisted operations in managed memory devices

PublishedOctober 25, 2022
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

Devices and techniques for efficient host assisted logical-to-physical (L2P) mapping are described herein. For example, a command can be executed that results in a change as to which physical address of a memory device corresponds to a logical address. The change can be obfuscated as part of an obfuscated L2P map for the memory device and written to storage on the memory device. The change can then be provided a host from the storage.

Patent Claims
18 claims

Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.

Claim 3

Original Legal Text

3. The memory device of claim 2, wherein a region is a segment of the obfuscated L2P map which the host can request in accordance with a communication protocol between the host and the memory device.

Plain English translation pending...
Claim 4

Original Legal Text

4. The memory device of claim 2, wherein a sub-region is a smallest number of bits that can be obfuscated by the memory device.

Plain English Translation

A memory device is designed to enhance data security by obfuscating portions of stored data. The device includes a memory array divided into multiple sub-regions, where each sub-region represents the smallest unit of data that can be independently obfuscated. Obfuscation involves altering the data in a sub-region to prevent unauthorized access or reverse engineering. The memory device also includes a controller that manages the obfuscation process, determining which sub-regions to obfuscate and applying the necessary transformations. The controller may use encryption, scrambling, or other techniques to modify the data in the selected sub-regions. The device further includes a configuration module that defines the size and boundaries of each sub-region, ensuring that obfuscation is applied at the granularity of these smallest units. This approach allows for selective protection of sensitive data while leaving other data accessible. The memory device may be integrated into various systems, such as embedded devices, secure storage solutions, or cryptographic modules, where data confidentiality is critical. The smallest obfuscatable unit ensures that even small portions of data can be protected without affecting larger, non-sensitive sections. This design improves security by minimizing the exposure of unprotected data and providing flexible control over data obfuscation.

Claim 5

Original Legal Text

5. The memory device of claim 1, wherein the instructions configure the processing circuitry to de-obfuscate a portion of the L2P map from a non-volatile storage array to volatile memory to perform an operation on the memory device, the operation being one of reading, writing, wear leveling, or garbage collection, wherein the memory device does not maintain a de-obfuscated version of the L2P map in the non-volatile storage array.

Plain English Translation

This invention relates to memory devices, specifically those using a logical-to-physical (L2P) mapping system to manage data storage. The problem addressed is the need to securely and efficiently access the L2P map for operations like reading, writing, wear leveling, or garbage collection without storing a de-obfuscated version in non-volatile storage, which could expose sensitive data. The memory device includes a non-volatile storage array and processing circuitry configured to execute instructions. When performing an operation, the processing circuitry de-obfuscates only a portion of the L2P map from the non-volatile storage array into volatile memory. This partial de-obfuscation allows the operation to proceed without fully exposing the L2P map in its unprotected form. The memory device ensures that no de-obfuscated version of the L2P map remains in the non-volatile storage array, enhancing security by preventing unauthorized access to the mapping data. The invention improves security by minimizing the exposure of the L2P map in its unprotected state, reducing the risk of data leaks or tampering. It also optimizes performance by selectively de-obfuscating only the necessary portions of the map for each operation, rather than maintaining a fully de-obfuscated map in non-volatile storage. This approach balances security and efficiency in memory management.

Claim 6

Original Legal Text

6. The memory device of claim 1, wherein the instructions configure the processing circuitry to maintaining a map of valid or dirty bits to track changes to the sub-region.

Plain English translation pending...
Claim 7

Original Legal Text

7. The memory device of claim 1, wherein the instructions configure the processing circuitry to provide the change to the host in response to a host establishing communications with the memory device following a power-up of the host.

Plain English translation pending...
Claim 8

Original Legal Text

8. The memory device of claim 1, wherein the instructions configure the processing circuitry to obfuscate the change in response to an idle period of the memory device.

Plain English translation pending...
Claim 11

Original Legal Text

11. The method of claim 10, wherein a region is a segment of the obfuscated L2P map which the host can request in accordance with a communication protocol between the host and the memory device.

Plain English translation pending...
Claim 12

Original Legal Text

12. The method of claim 10, wherein a sub-region is a smallest number of bits that can be obfuscated by the memory device.

Plain English translation pending...
Claim 13

Original Legal Text

13. The method of claim 9, comprising de-obfuscating a portion of the L2P map from a non-volatile storage array to volatile memory to perform an operation on the memory device, the operation being one of reading, writing, wear leveling, or garbage collection, wherein the memory device does not maintain a de-obfuscated version of the L2P map in the non-volatile storage array.

Plain English translation pending...
Claim 14

Original Legal Text

14. The method of claim 9, comprising maintaining a map of valid or dirty bits to track changes to the sub-region.

Plain English Translation

A method for managing data storage involves tracking changes to a sub-region of a memory system. The method includes maintaining a map of valid or dirty bits to monitor modifications within the sub-region. This map allows the system to identify which portions of the sub-region have been updated or remain unchanged. The tracking mechanism helps optimize data management by distinguishing between valid data that needs to be preserved and dirty data that may require erasure or rewriting. The method may also involve dividing a larger memory region into smaller sub-regions to improve efficiency in tracking and updating data. By using a bit-based map, the system can quickly determine the state of each sub-region, enabling faster operations such as garbage collection or wear leveling. This approach reduces overhead by minimizing unnecessary read or write operations, enhancing overall system performance and reliability. The method is particularly useful in non-volatile memory systems, such as flash storage, where efficient data management is critical for longevity and speed. The map of valid or dirty bits ensures that only relevant portions of the memory are processed, conserving resources and extending the lifespan of the storage medium.

Claim 15

Original Legal Text

15. The method of claim 9, wherein providing the change to the host is performed in response to a host establishing communications with the memory device following a power-up of the host.

Plain English translation pending...
Claim 16

Original Legal Text

16. The method of claim 9, wherein obfuscating the change is performed in response to an idle period of the memory device.

Plain English Translation

A method for obfuscating changes in a memory device involves modifying data storage patterns to prevent unauthorized access or analysis. The technique is applied during idle periods of the memory device, ensuring that the obfuscation process does not interfere with active operations. This approach helps maintain data security by making it difficult for attackers to track or reverse-engineer stored information. The method may include techniques such as shuffling data blocks, altering storage addresses, or introducing dummy operations to disrupt predictable access patterns. By performing these actions during idle times, the system avoids performance degradation while still enhancing security. The obfuscation process can be dynamically adjusted based on system conditions, such as the length of the idle period or the type of data being protected. This ensures that the method remains effective without unnecessary resource consumption. The overall goal is to provide a secure and efficient way to protect sensitive data in memory devices from unauthorized access or analysis.

Claim 19

Original Legal Text

19. The non-transitory machine-readable medium of claim 18, wherein a region is a segment of the obfuscated L2P map which the host can request in accordance with a communication protocol between the host and the memory device.

Plain English translation pending...
Claim 20

Original Legal Text

20. The non-transitory machine-readable medium of claim 18, wherein a sub-region is a smallest number of bits that can be obfuscated by the memory device.

Plain English translation pending...
Claim 21

Original Legal Text

21. The non-transitory machine-readable medium of claim 17, wherein the operations comprise de-obfuscating a portion of the L2P map from a non-volatile storage array to volatile memory to perform an operation on the memory device, the operation being one of reading, writing, wear leveling, or garbage collection, wherein the memory device does not maintain a de-obfuscated version of the L2P map in the non-volatile storage array.

Plain English translation pending...
Claim 22

Original Legal Text

22. The non-transitory machine-readable medium of claim 17, wherein the operations comprise maintaining a map of valid or dirty bits to track changes to the sub-region.

Plain English translation pending...
Claim 23

Original Legal Text

23. The non-transitory machine-readable medium of claim 17, wherein providing the change to the host is performed in response to a host establishing communications with the memory device following a power-up of the host.

Plain English translation pending...
Claim 24

Original Legal Text

24. The non-transitory machine-readable medium of claim 17, wherein obfuscating the change is performed in response to an idle period of the memory device.

Plain English translation pending...
Classification Codes (CPC)

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Patent Metadata

Filing Date

August 19, 2019

Publication Date

October 25, 2022

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