Patentable/Patents/US-11489437
US-11489437

DC inverter/converter current balancing for paralleled phase leg switches

PublishedNovember 1, 2022
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

Current imbalances between parallel switching devices in a power converter half leg are reduced. A gate driver generates a nominal PWM gate drive signal for a respective half leg. A first feedback loop couples the nominal PWM gate drive signal to a gate terminal of a respective first switching device. The first feedback loop has a first mutual inductance with a current path of a first parallel switching device and has a second mutual inductance with a current path of a second parallel switching device. The first and second mutual inductances are arranged to generate opposing voltages in the first feedback loop, so that when all the parallel switching devices carry equal current then the voltages cancel.

Patent Claims
13 claims

Legal claims defining the scope of protection, as filed with the USPTO.

2

2. The power converter of claim 1 wherein the first mutual inductance is comprised of a first winding in the first feedback loop magnetically coupled to the respective current path of the first switching device, and wherein the second mutual inductance is comprised of a second winding in the first feedback loop magnetically coupled to the respective current path of the second switching device.

3

3. The power converter of claim 1 wherein the first mutual inductance includes a common source inductance of the first switching device.

4

4. The power converter of claim 1 wherein the first feedback loop further includes a loss-reduction mutual inductance with the current path of the first switching device.

5

5. The power converter of claim 4 wherein the first mutual inductance and the loss-reduction mutual inductance are generated by a multi-turn winding magnetically coupled to the current path of the first switching device.

6

6. The power converter of claim 1 further comprising second and third phase legs with respective half legs each including a plurality of parallel switching devices, wherein each switching device receives a respective gate drive signal via a respective feedback loop configured to balance currents within each respective half leg using mutual inductance of the respective feedback loop with current paths of each of the switching devices connected in parallel in the respective half leg.

7

7. The power converter of claim 1 wherein the first and second switching devices are comprised of a transfer-molded power module having a printed circuit board, wherein the first and second mutual inductances are comprised of conductive traces forming respective loops on the printed circuit board coinciding with regions of concentrated magnetic flux generated by current flow in the first and second switching devices.

9

9. The inverter of claim 8 wherein the first mutual inductance is comprised of a first winding in the first feedback loop magnetically coupled to the respective current path of the first switching device, and wherein the second mutual inductance is comprised of a second winding in the first feedback loop magnetically coupled to the respective current path of the second switching device.

10

10. The inverter of claim 8 wherein the first mutual inductance includes a common source inductance of the first switching device.

11

11. The inverter of claim 8 wherein the first feedback loop further includes a loss-reduction mutual inductance with the current path of the first switching device.

12

12. The inverter of claim 11 wherein the first mutual inductance and the loss-reduction mutual inductance are generated by a multi-turn winding magnetically coupled to the current path of the first switching device.

13

13. The inverter of claim 8 further comprising second and third phase legs with respective half legs each including a plurality of parallel switching devices, wherein each switching device receives a respective gate drive signal via a respective feedback loop configured to balance currents within each respective half leg using mutual inductance of the respective feedback loop with current paths of each of the switching devices connected in parallel in the respective half leg.

14

14. The inverter of claim 8 wherein the first and second switching devices are comprised of a transfer-molded power module having a printed circuit board, wherein the first and second mutual inductances are comprised of conductive traces forming respective loops on the printed circuit board coinciding with regions of concentrated magnetic flux generated by current flow in the first and second switching devices.

15

15. The inverter of claim 14 wherein the switching devices are comprised of insulated gate bipolar transistors.

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Patent Metadata

Filing Date

June 21, 2021

Publication Date

November 1, 2022

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Cite as: Patentable. “DC inverter/converter current balancing for paralleled phase leg switches” (US-11489437). https://patentable.app/patents/US-11489437

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