Patentable/Patents/US-11511546
US-11511546

Logic circuitry package

PublishedNovember 29, 2022
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A logic circuitry package for a replaceable print apparatus component includes an interface to communicate with a print apparatus logic circuit, and at least one logic circuit to transmit, via the interface, a sensor ID parameter and a limit parameter, the sensor ID parameter indicating a first sensor ID. The logic circuit is to receive, via the interface, a first request corresponding to the first sensor ID with the component connected to the apparatus and the apparatus not pneumatically actuating the component. The logic circuit is to transmit, via the interface, a first digital value in response to the first request. The logic circuit is to receive, via the interface, a second request corresponding to the first sensor ID with the component connected to the apparatus and the apparatus pneumatically actuating the component. The logic circuit is to transmit, via the interface, a second digital value in response to the second request. A difference between the first digital value and the second digital value is greater than the limit parameter.

Patent Claims
6 claims

Legal claims defining the scope of protection, as filed with the USPTO.

5

5. The logic circuitry package of claim 4, wherein the different digital values include the first digital value and at least one different digital value clipped at the end of a range defined by a natural number of bytes.

6

6. The logic circuitry package of claim 1, wherein the at least one logic circuit is configured to transmit the sensor ID parameter and the limit parameter in response to a request to a first default address of the logic circuitry package and to transmit the first and second digital values in response to the first and second requests to a second default address and/or a reconfigured address of the logic circuitry package.

9

9. The logic circuitry package of claim 8, wherein the at least one logic circuit is configured to, with the logic circuitry package mounted to the component and with the component connected to the apparatus and the apparatus not pneumatically actuating the component, output the first and/or third digital value at an internal reservoir pressure of the component of approximately 0 kPa gauge pressure or less.

10

10. The logic circuitry package of claim 1, wherein the at least one logic circuit comprises a memory storing the sensor ID parameter and the limit parameter, wherein the memory stores digitally signed data comprising the sensor ID parameter and the limit parameter.

15

15. The logic circuitry package of claim 14, wherein the at least one logic circuit comprises a memory storing the sensor ID parameter, the limit parameter, the step parameter, and a step number parameter.

16

16. The logic circuitry package of claim 15, wherein the memory stores digitally signed data comprising the sensor ID parameter, the limit parameter, the step parameter, and the step number parameter.

Classification Codes (CPC)

Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.

Patent Metadata

Filing Date

October 25, 2019

Publication Date

November 29, 2022

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Cite as: Patentable. “Logic circuitry package” (US-11511546). https://patentable.app/patents/US-11511546

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