A pixel circuit of a display device Includes: an electro-optical element; a drive transistor; a write control transistor; a threshold compensation transistor; two light emission control transistors; a first initialization transistor having a first conduction terminal connected to a gate terminal of the drive transistor, a second conduction terminal to which an initialization voltage is applied, and a gate terminal connected to a first initialization control line; and a capacitor provided between a first conductive member and the gate terminal of the drive transistor. In a non-light emission period, time during which a voltage of the first initialization control line is at an on-level is longer than a period during which a voltage of a scanning line is at the on-level. As a result, a display device capable of sufficiently initializing the gate terminal of the drive transistor is provided.
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2. The display device according to claim 1, wherein within the non-light emission period, the length of the time during which the voltage of the corresponding first initialization control line is at the on-level is twice or more than the length of the period during which the voltage of the corresponding scanning line is at the on-level.
This invention relates to display devices, specifically addressing the control of initialization and scanning signals in organic light-emitting diode (OLED) displays to improve performance. The problem being solved involves optimizing the timing of initialization and scanning signals to enhance display uniformity and reduce power consumption. The display device includes a plurality of pixels, each connected to a first initialization control line and a scanning line. During a non-light emission period, the voltage of the first initialization control line is set to an on-level to initialize the pixel circuits. The key improvement is that the duration during which the first initialization control line remains at the on-level is at least twice as long as the duration during which the corresponding scanning line is at the on-level. This extended initialization time ensures proper reset of the pixel circuits, reducing variations in threshold voltage and improving display consistency. The scanning line controls the selection of pixels for data writing, and its shorter on-level duration minimizes unnecessary power consumption while maintaining efficient data refresh rates. The extended initialization period helps stabilize the pixel circuits before the next scanning cycle, leading to more uniform brightness and longer device lifespan. This timing adjustment is particularly beneficial in high-resolution or large-area OLED displays where precise control of pixel initialization is critical.
3. The display device according to claim 1, wherein the period during which the voltage of the corresponding scanning line is at the on-level is shorter than one horizontal period.
A display device includes a display panel with scanning lines and data lines, where each scanning line is connected to a gate driver circuit. The gate driver circuit applies a voltage to the scanning lines to control the display panel's operation. The voltage applied to a scanning line alternates between an on-level and an off-level, where the on-level voltage activates the scanning line to allow data signals from the data lines to be written to pixels connected to that scanning line. The off-level voltage deactivates the scanning line, preventing data writing. The duration during which the voltage of a scanning line is at the on-level is shorter than one horizontal period, which is the time allocated for writing data to all pixels in a single row of the display panel. This shorter on-level duration allows for faster switching between scanning lines, improving display performance and reducing power consumption. The gate driver circuit may include multiple stages, each stage generating a control signal to control the voltage applied to a corresponding scanning line. The control signal may be generated based on a clock signal and a start pulse signal, ensuring synchronized operation across the display panel. The display device may be used in various applications, including televisions, monitors, and mobile devices, where efficient and rapid pixel addressing is required.
4. The display device according to claim 1, wherein the voltage of the corresponding scanning line changes to the on-level after a data voltage corresponding to a video signal is applied to the corresponding data line.
A display device includes a pixel circuit with a driving transistor and a light-emitting element, where the driving transistor controls current flow to the light-emitting element based on a data voltage applied to a data line. The device also includes a scanning line that controls the switching of the driving transistor. The voltage of the scanning line changes to an on-level after the data voltage, corresponding to a video signal, is applied to the data line. This ensures that the driving transistor is turned on only after the data voltage is stabilized, preventing errors in current control. The light-emitting element emits light based on the stabilized current, improving display accuracy. The device may also include a capacitor to store the data voltage and maintain stable current flow. The scanning line voltage transition to the on-level after data voltage application ensures proper timing and reduces power consumption by avoiding unnecessary current flow during voltage transitions. This design enhances display performance by maintaining consistent brightness and reducing flicker.
5. The display device according to claim 4, wherein the voltage of the corresponding scanning line changes to the off-level before the application of the data voltage to the corresponding data line ends.
A display device includes a display panel with multiple scanning lines and data lines intersecting to form pixels. The device controls the voltage applied to the scanning lines to selectively turn pixels on or off. The invention addresses the problem of signal interference and timing mismatches during pixel charging, which can lead to display artifacts such as flickering or uneven brightness. To solve this, the device adjusts the voltage of a scanning line to an off-level before the application of a data voltage to a corresponding data line is fully completed. This ensures that the pixel charging process is properly terminated, preventing residual voltage effects and improving display stability. The scanning line voltage transition to the off-level occurs while the data line voltage is still being applied, allowing for precise control over the pixel charging duration. This method enhances the accuracy of pixel activation and deactivation, reducing visual distortions and improving overall display performance. The invention is particularly useful in high-resolution or high-refresh-rate displays where precise timing control is critical.
6. The display device according to claim 1, wherein the period during which the voltage of the corresponding first initialization control line is at the on-level and a period during which a voltage of the corresponding second initialization control line is at the on-level are provided one by one so as to partially overlap each other within the non-light emission period.
This invention relates to display devices, specifically addressing the control of initialization signals in non-light emission periods to improve display performance. The problem being solved involves managing the timing of initialization control lines to prevent interference and ensure proper display operation. The display device includes a plurality of pixels, each connected to a first initialization control line and a second initialization control line. The first initialization control line provides a voltage at an on-level during a first period, while the second initialization control line provides a voltage at an on-level during a second period. These periods are staggered such that they partially overlap within the non-light emission period of the display. This overlapping ensures that the initialization signals do not interfere with each other, allowing for proper initialization of the pixels without disrupting display functionality. The overlapping periods also help reduce power consumption and improve the efficiency of the display device by minimizing the time required for initialization. The invention is particularly useful in display technologies where precise timing of control signals is critical, such as organic light-emitting diode (OLED) displays. By carefully controlling the timing of the initialization signals, the display device can maintain high image quality while reducing power consumption and improving reliability. The overlapping periods of the initialization control lines ensure that the display remains stable and free from artifacts caused by improper initialization.
7. The display device according to claim 1, wherein the voltage of the corresponding scanning line changes to the off-level at timing when the voltage of the corresponding second initialization control line changes to the off-level.
A display device includes a pixel circuit with a driving transistor and a light-emitting element, where the driving transistor controls current flow to the light-emitting element. The device also includes a first initialization control line and a second initialization control line, which are used to initialize the voltage of a node connected to the gate of the driving transistor. The first initialization control line resets the voltage of this node to a reference voltage, while the second initialization control line further adjusts the voltage to ensure proper operation of the pixel circuit. The display device also includes a scanning line that controls the switching of a transistor within the pixel circuit to allow or block current flow. The voltage of the scanning line changes to an off-level at the same time as the voltage of the second initialization control line changes to its off-level. This synchronization ensures that the pixel circuit is properly initialized before the scanning line transitions to its off-state, preventing unwanted current flow and improving display performance. The coordinated timing of these voltage changes helps maintain accurate voltage levels at the gate of the driving transistor, reducing flicker and enhancing image quality. The device may be used in organic light-emitting diode (OLED) displays or other types of emissive displays where precise control of pixel circuit voltages is required.
8. The display device according to claim 1, wherein a plurality of periods during which the voltage of the corresponding first initialization control line is at the on-level and a plurality of periods during which a voltage of the corresponding second initialization control line is at the on-level are provided within the non-light emission period.
A display device includes a plurality of pixels, each connected to a first initialization control line and a second initialization control line. The device operates in a non-light emission period where the voltage of the first initialization control line is set to an on-level to initialize a driving transistor within the pixel. The second initialization control line is also set to an on-level during this period to initialize a light-emitting element. Multiple on-level periods for the first initialization control line and multiple on-level periods for the second initialization control line are provided within the non-light emission period. This allows for separate and controlled initialization of the driving transistor and the light-emitting element, improving display performance by ensuring proper reset conditions before the next light emission cycle. The initialization process helps mitigate issues such as threshold voltage shifts in the driving transistor and residual charge in the light-emitting element, leading to more consistent and accurate pixel operation. The timing and duration of these on-level periods can be adjusted to optimize display quality and power efficiency.
9. The display device according to claim 8, wherein each of the periods during which the voltage of the corresponding first initialization control line is at the on-level and each of the periods during which the voltage of the corresponding second initialization control line is at the on-level do not overlap.
The invention relates to display devices, specifically addressing the control of initialization signals in display panels to prevent interference between initialization operations. In display devices, initialization control lines are used to reset or initialize pixel circuits before they receive data signals. However, when multiple initialization control lines are activated simultaneously or overlap in time, signal interference can occur, leading to display artifacts or malfunctions. The invention provides a display device with a first initialization control line and a second initialization control line, each controlling the initialization of different pixel circuits or components. The device ensures that the periods during which the voltage of the first initialization control line is at an on-level (active state) and the periods during which the voltage of the second initialization control line is at an on-level do not overlap. This non-overlapping timing prevents signal conflicts, ensuring proper initialization of the display elements without interference. The invention may be applied in various display technologies, including organic light-emitting diode (OLED) displays, where precise control of initialization signals is critical for maintaining image quality and reliability. By avoiding simultaneous activation of initialization control lines, the device improves display performance and reduces the risk of errors caused by signal crosstalk.
10. The display device according to claim 8, wherein the period during which the voltage of the corresponding first initialization control line is at the on-level and the period during which the voltage of the corresponding second initialization control line is at the on-level are alternately provided within the non-light emission period.
A display device includes a pixel circuit with a driving transistor and a light-emitting element, such as an organic light-emitting diode (OLED). The device addresses the problem of maintaining display quality by preventing degradation of the driving transistor and ensuring accurate current control for consistent brightness. The pixel circuit includes first and second initialization control lines that manage the initialization of the driving transistor and the light-emitting element. During a non-light emission period, the voltages of these control lines are alternately set to an on-level to sequentially initialize the driving transistor and the light-emitting element. This alternating initialization prevents overlapping initialization periods, reducing power consumption and improving display stability. The driving transistor's gate voltage is reset to a reference voltage during initialization, ensuring consistent current flow and brightness. The light-emitting element's parasitic capacitance is also reset to a stable voltage level, preventing voltage fluctuations that could affect emission uniformity. The alternating control of the first and second initialization control lines optimizes the initialization process, enhancing display performance and longevity.
11. The display device according to claim 8, wherein the voltage of the scanning line changes to the off-level at timing when the voltage of the corresponding second initialization control line changes to the off-level last within the non-light emission period.
This invention relates to display devices, specifically addressing the timing control of scanning lines and initialization control lines to improve display performance. The problem being solved involves optimizing the timing of voltage changes in scanning lines and initialization control lines during non-light emission periods to enhance display efficiency and reduce power consumption. The display device includes a plurality of pixels, each connected to a scanning line and a second initialization control line. The scanning line controls the on/off state of the pixel, while the second initialization control line initializes the pixel's voltage. During the non-light emission period, the voltage of the scanning line transitions to an off-level at the same time as the voltage of the corresponding second initialization control line transitions to its off-level. This synchronized timing ensures that the pixel is properly initialized before entering the off-state, preventing unwanted voltage fluctuations and improving display stability. The invention ensures that the second initialization control line's off-level transition occurs last within the non-light emission period, allowing the pixel to fully initialize before the scanning line turns off. This timing control reduces power consumption by minimizing unnecessary voltage transitions and enhances display uniformity by ensuring consistent pixel initialization. The solution is particularly useful in high-resolution displays where precise timing control is critical for maintaining image quality.
12. The display device according to claim 8, wherein the voltage of the corresponding scanning line changes to the on-level at timing when the voltage of the corresponding second initialization control line changes to the on-level last within the non-light emission period.
The invention relates to display devices, specifically addressing timing control in organic light-emitting diode (OLED) displays to improve power efficiency and image quality. The problem solved is the inefficient voltage transitions in scanning lines and initialization control lines during non-light emission periods, which can lead to power waste and display artifacts. The display device includes a plurality of pixels, each connected to a scanning line and a second initialization control line. During the non-light emission period, the voltage of the scanning line transitions to an on-level at the same time as the second initialization control line transitions to its on-level for the last time. This synchronized timing ensures that the initialization process is completed efficiently, reducing unnecessary power consumption and preventing potential display irregularities. The scanning line controls the selection of pixels for data writing, while the second initialization control line resets the pixel circuits to a known state before new data is written. By coordinating these transitions, the display device optimizes the initialization phase, leading to more stable and energy-efficient operation. The invention is particularly useful in high-resolution or high-refresh-rate displays where precise timing control is critical.
13. The display device according to claim 8, wherein the voltage of the corresponding scanning line changes to the on-level after the voltage of the corresponding second initialization control line changes to the on-level last within the non-light emission period.
A display device includes a pixel circuit with a driving transistor for controlling current flow to a light-emitting element, such as an OLED. The device addresses issues related to voltage fluctuations and threshold voltage shifts in the driving transistor, which can degrade display performance over time. The pixel circuit includes multiple control lines, including a scanning line, an initialization control line, and a second initialization control line, which regulate the operation of transistors within the pixel circuit. During a non-light emission period, the voltage of the second initialization control line transitions to an on-level last, ensuring proper initialization of the driving transistor before the scanning line activates. This sequence prevents premature activation of the driving transistor, reducing errors in voltage compensation and improving display uniformity. The timing control ensures that the initialization process is completed before the scanning line enables data writing, enhancing the stability and accuracy of the pixel circuit's operation. The device is particularly useful in high-resolution displays where precise current control is critical.
14. The display device according to claim 8, wherein a last period of the plurality of periods during which the voltage of the corresponding second initialization control line provided within the non-light emission period is at the on-level is longer than a period during which the voltage of the corresponding scanning line is at the on-level.
The invention relates to display devices, specifically addressing the control of initialization signals in non-light emission periods to improve display performance. The problem being solved involves optimizing the timing of initialization signals to ensure proper operation of display elements, particularly in organic light-emitting diode (OLED) or similar display technologies where precise control of voltage levels is critical. The display device includes a plurality of scanning lines and second initialization control lines, each associated with display elements. During non-light emission periods, the voltage of the second initialization control lines is set to an on-level to initialize the display elements. The key innovation is that the last period during which the second initialization control line voltage remains at the on-level is longer than the period during which the corresponding scanning line voltage is at the on-level. This extended on-level period ensures that the initialization process is completed before the scanning line transitions, preventing timing conflicts and improving display stability. The scanning lines are used to select display elements for addressing, while the second initialization control lines provide initialization signals to reset or prepare the display elements for subsequent operations. By extending the on-level duration of the second initialization control lines, the device ensures that initialization is fully completed before the scanning line transitions, reducing the risk of incomplete initialization and enhancing display uniformity and reliability. This timing adjustment is particularly useful in high-resolution or high-refresh-rate displays where precise control of signal timing is essential.
15. The display device according to claim 1, wherein the voltage of the corresponding first initialization control line changes to the on-level after the voltage of the corresponding light emission control line changes to the off-level.
A display device includes a pixel circuit with a light emission control line and a first initialization control line. The pixel circuit controls light emission from a light-emitting element, such as an organic light-emitting diode (OLED), by regulating current flow through a driving transistor. The light emission control line controls the on/off state of the driving transistor, while the first initialization control line resets the voltage of a node in the pixel circuit to a reference voltage during initialization. The invention addresses the problem of ensuring proper initialization and light emission control in display devices, particularly in OLEDs, by coordinating the timing of these control signals. Specifically, the voltage of the first initialization control line transitions to an on-level only after the voltage of the light emission control line has already transitioned to an off-level. This timing sequence prevents interference between the initialization and light emission processes, ensuring accurate voltage reset and stable light emission. The solution improves display performance by reducing flicker, enhancing brightness uniformity, and extending the lifespan of the light-emitting elements. The display device may be part of a larger system, such as a television, smartphone, or digital signage, where precise control of pixel circuits is critical for high-quality visual output.
16. The display device according to claim 1, wherein the voltage of the corresponding first initialization control line changes to the off-level before the voltage of the corresponding light emission control line changes to the on-level.
This invention relates to display devices, specifically addressing timing control in organic light-emitting diode (OLED) displays to improve performance and reliability. The problem being solved involves ensuring proper initialization of driving transistors in OLED pixels before light emission occurs, which is critical for accurate image display and longevity of the display components. The display device includes a plurality of pixels, each connected to a first initialization control line and a light emission control line. The first initialization control line is used to initialize the driving transistor in each pixel by setting it to a known state before the pixel emits light. The light emission control line controls when the pixel emits light by enabling or disabling current flow to the OLED element. The key innovation is the timing sequence between the first initialization control line and the light emission control line. The voltage of the first initialization control line transitions to an off-level (a state that disables initialization) before the voltage of the light emission control line transitions to an on-level (a state that enables light emission). This ensures that the driving transistor is fully initialized and stable before the pixel begins emitting light, preventing erratic behavior or degradation of the OLED element due to improper initialization. The timing control helps maintain consistent brightness and color accuracy across the display while extending the lifespan of the OLED components.
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March 28, 2019
December 13, 2022
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