Patentable/Patents/US-11528023
US-11528023

Under voltage lockout circuit and method thereof

PublishedDecember 13, 2022
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

An under voltage lockout circuit includes a reference circuit, an oscillator, a voltage divider, and a dynamic comparator. The reference circuit generates a reference voltage signal and a current source activation signal. The oscillator is activated to generate a clock signal after receiving the current source activation signal. The voltage divider samples an operating voltage signal to generate a detection voltage signal after receiving the clock signal. The voltage divider includes a switched-capacitor circuit for adjusting a ratio of the detection voltage signal to the operating voltage signal. The dynamic comparator receives the clock signal, the detection voltage signal and the reference voltage signal, and compares the reference voltage signal with the detection voltage signal only after receiving the clock signal. When the reference voltage signal is higher than the detection voltage signal, the dynamic comparator outputs a power-on-reset pulse signal.

Patent Claims
8 claims

Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.

Claim 2

Original Legal Text

2. The under voltage lockout circuit according to claim 1, wherein the current generating circuit is a constant transduction circuit.

Plain English Translation

An under voltage lockout (UVLO) circuit is used in electronic systems to prevent operation when the supply voltage is insufficient, protecting components from damage. A constant transduction circuit generates a reference current that remains stable across varying supply voltages, ensuring reliable UVLO operation. This circuit typically includes a current mirror or a bandgap reference to maintain a fixed current output despite fluctuations in the input voltage. The constant transduction circuit provides a precise and stable reference for comparison against the supply voltage, enabling accurate detection of under-voltage conditions. By maintaining a consistent current, the UVLO circuit can reliably trigger a shutdown or reset when the supply voltage falls below a predefined threshold, ensuring system safety and stability. This approach improves the robustness of the UVLO function, particularly in applications where supply voltage variations are common, such as in battery-powered or noisy environments. The constant transduction circuit may also include temperature compensation to further enhance stability across different operating conditions.

Claim 3

Original Legal Text

3. The under voltage lockout circuit according to claim 1, wherein the reference voltage generating circuit is a bandgap reference circuit.

Plain English Translation

An under voltage lockout (UVLO) circuit monitors a power supply voltage and disables a load circuit when the supply voltage falls below a predefined threshold. This prevents malfunction or damage to the load circuit during low-voltage conditions. A key component of the UVLO circuit is a reference voltage generating circuit that produces a stable reference voltage for comparison against the supply voltage. The reference voltage must remain accurate across temperature and process variations to ensure reliable operation. In this invention, the reference voltage generating circuit is implemented as a bandgap reference circuit. Bandgap reference circuits are widely used for generating stable reference voltages in integrated circuits. They leverage the temperature-dependent characteristics of semiconductor devices to produce a voltage that is relatively insensitive to temperature changes. The bandgap reference circuit typically combines a proportional-to-absolute-temperature (PTAT) voltage with a complementary-to-absolute-temperature (CTAT) voltage to achieve temperature compensation. This results in a reference voltage with low drift over temperature, making it suitable for precise voltage monitoring in UVLO applications. By using a bandgap reference circuit, the UVLO circuit achieves improved stability and accuracy in detecting under-voltage conditions, ensuring reliable protection for the load circuit. The bandgap reference circuit's inherent temperature compensation reduces the need for additional calibration or external components, simplifying the design and improving overall system robustness.

Claim 4

Original Legal Text

4. The under voltage lockout circuit according to claim 1, wherein the voltage divider is a switched-capacitor circuit configured to adjust a ratio of the detection voltage signal to the operating voltage signal.

Plain English Translation

An under voltage lockout (UVLO) circuit monitors an operating voltage and disables a system if the voltage falls below a threshold. A key challenge is accurately detecting the voltage while minimizing power consumption and component count. The invention addresses this by using a switched-capacitor voltage divider to dynamically adjust the ratio between the detection voltage signal and the operating voltage signal. This allows precise threshold detection without requiring a fixed resistor-based divider, which can be inefficient or inaccurate. The switched-capacitor design enables programmable voltage scaling, reducing power loss and improving flexibility. The circuit can be integrated into power management systems, ensuring reliable operation by disabling components when voltage levels are unsafe. The adjustable ratio feature allows the UVLO threshold to be fine-tuned for different applications, enhancing versatility. This approach improves efficiency and reliability compared to traditional resistor-based dividers, which may introduce static power dissipation or require additional calibration. The invention is particularly useful in battery-powered or low-power devices where energy efficiency and accurate voltage monitoring are critical.

Claim 5

Original Legal Text

5. The under voltage lockout circuit according to claim 1, wherein when the reference voltage signal is not higher than the detection voltage signal, the dynamic comparator is maintained at an off state.

Plain English Translation

An under voltage lockout (UVLO) circuit is used in power management systems to prevent operation when the input voltage is insufficient, protecting electronic devices from malfunction or damage. A key challenge is ensuring reliable detection of voltage thresholds while minimizing power consumption and circuit complexity. This invention describes an improved UVLO circuit featuring a dynamic comparator that remains in an off state when the reference voltage signal does not exceed the detection voltage signal. The dynamic comparator is a low-power, high-speed voltage comparator that activates only when the input voltage reaches a predefined threshold. The reference voltage signal is a stable voltage level set by a reference generator, while the detection voltage signal is derived from the input voltage to be monitored. By keeping the comparator off when the reference voltage is not higher than the detection voltage, the circuit reduces unnecessary power consumption and improves efficiency. The comparator includes a differential input stage, a latch for rapid decision-making, and a reset mechanism to ensure proper operation. The circuit also includes a feedback loop to maintain stability and accuracy in voltage detection. This design enhances reliability and energy efficiency in power management applications.

Claim 6

Original Legal Text

6. The under voltage lockout circuit according to claim 1, wherein the voltage divider is activated later than activation of the oscillator.

Plain English Translation

An under voltage lockout (UVLO) circuit is used in power management systems to prevent operation when the input voltage is insufficient, ensuring reliable and safe operation of electronic devices. A key challenge in designing such circuits is ensuring proper sequencing of components to avoid false triggering or instability during startup. This invention describes an improved UVLO circuit where a voltage divider, used to monitor the input voltage, is activated after the oscillator circuit. The oscillator generates a clock signal for the UVLO circuit, and delaying the activation of the voltage divider ensures that the oscillator is stable before voltage monitoring begins. This prevents erroneous voltage measurements during transient conditions, improving reliability. The voltage divider is connected to a comparator that compares the divided voltage against a reference threshold. If the input voltage is below the threshold, the UVLO circuit disables the system to prevent malfunction. The delayed activation of the voltage divider ensures accurate voltage assessment only after the oscillator is fully operational, reducing false lockout events. This design is particularly useful in low-power or battery-operated devices where power efficiency and stability are critical.

Claim 7

Original Legal Text

7. The under voltage lockout circuit according to claim 1, wherein the dynamic comparator is activated later than activation of the oscillator.

Plain English Translation

An under voltage lockout (UVLO) circuit is used in electronic systems to prevent operation when the supply voltage is insufficient, protecting components from damage. A key challenge is ensuring reliable detection of the supply voltage level while minimizing power consumption and avoiding false triggering. A dynamic comparator is often used in UVLO circuits to compare the supply voltage against a reference threshold. However, activating the comparator simultaneously with the oscillator can lead to excessive power consumption or inaccurate voltage detection due to transient conditions. This invention improves the UVLO circuit by delaying the activation of the dynamic comparator relative to the oscillator. The oscillator is activated first to stabilize the system, and only after a delay is the comparator enabled to perform the voltage comparison. This staggered activation reduces power consumption by avoiding unnecessary comparator operation during transient states and improves accuracy by ensuring the supply voltage is stable before comparison. The delayed comparator activation ensures reliable voltage detection while maintaining low power operation, which is critical for battery-powered or energy-sensitive applications. The invention is particularly useful in integrated circuits where power efficiency and reliability are essential.

Claim 9

Original Legal Text

9. The under voltage lockout circuit according to claim 8, wherein when the reference voltage signal is not higher than the detection voltage signal, the dynamic comparator is maintained at an off state.

Plain English Translation

An under voltage lockout (UVLO) circuit is used in power management systems to prevent operation when the input voltage is insufficient, protecting components from damage. A dynamic comparator within the UVLO circuit compares a reference voltage signal against a detection voltage signal derived from the input voltage. When the detection voltage signal is higher than the reference voltage signal, the comparator activates, enabling the system. However, if the detection voltage signal does not exceed the reference voltage signal, the comparator remains in an off state, ensuring the system remains disabled. This prevents operation under low-voltage conditions, enhancing reliability. The dynamic comparator's off state minimizes power consumption when the input voltage is inadequate, improving efficiency. The circuit ensures safe operation by maintaining the comparator in an inactive state until the input voltage reaches a sufficient level, addressing the problem of unintended activation during power-up or voltage fluctuations. The design is particularly useful in battery-powered or sensitive electronic systems where voltage stability is critical.

Claim 11

Original Legal Text

11. The method of generating the power-on-reset pulse signal according to claim 10, wherein when the detection voltage signal is not higher than the reference voltage signal, maintaining the dynamic comparator at an off state.

Plain English Translation

A power-on-reset (POR) circuit generates a reset pulse signal during system startup to initialize digital circuits. The circuit monitors a detection voltage signal and compares it to a reference voltage signal using a dynamic comparator. When the detection voltage signal is below the reference voltage signal, the comparator remains inactive, preventing false triggering. The comparator activates only when the detection voltage signal exceeds the reference voltage, ensuring reliable reset signal generation. The circuit includes a voltage divider to generate the detection voltage from a supply voltage, a reference voltage generator to produce the reference voltage, and a dynamic comparator that operates in a low-power state until triggered. The comparator's output drives a pulse generator, which produces a reset pulse signal of a predefined duration. This method ensures stable system initialization by preventing premature reset activation during power-up transients. The dynamic comparator's off state when the detection voltage is low reduces power consumption and avoids erroneous operation. The circuit is particularly useful in low-power applications where reliable reset signaling is critical.

Classification Codes (CPC)

Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.

Patent Metadata

Filing Date

August 13, 2021

Publication Date

December 13, 2022

Want to explore more patents?

Browse 5M+ US patents with plain-English claim translations and AI-generated analysis.

Citation & reuse

Analysis on this page is generated by Patentable — an AI-powered patent intelligence platform. AI-generated summaries, explanations, FAQs, and analysis may be reused with attribution and a visible link back to the canonical URL below. Patent abstracts and claims are USPTO public domain.

Cite as: Patentable. “Under voltage lockout circuit and method thereof” (US-11528023). https://patentable.app/patents/US-11528023

© 2026 Nomic Interactive Technology LLC. Machine-readable context available at /api/llm-context/US-11528023. See llms.txt for full attribution policy.