An N-bit non-volatile multi-level memory cell (MLC) can include a lower electrode and an upper electrode spaced above the lower electrode. N ferroelectric material layers can be vertically spaced apart from one another between the lower electrode and the upper electrode, wherein N is at least 2 and at least one dielectric material layer having a thickness of less than 20 nm can be located between the N ferroelectric material layers.
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2. The N-bit non-volatile multi-level memory cell of claim 1 wherein N is equal to 2 providing a first ferroelectric material layer and a second ferroelectric material layer and the at least one dielectric material layer has a thickness of about 1 nm.
This invention relates to a non-volatile multi-level memory cell that uses ferroelectric materials to store data. The memory cell is designed to address the challenge of increasing storage density in memory devices while maintaining reliability and performance. The cell includes multiple ferroelectric material layers to enable multi-level data storage, where each layer contributes to distinct data states. Specifically, the cell is configured with two ferroelectric material layers, allowing it to store 2-bit data per cell. Additionally, the cell incorporates at least one dielectric material layer with a precisely controlled thickness of approximately 1 nm. This thin dielectric layer enhances the electrical properties of the cell, improving switching efficiency and reducing power consumption. The combination of multiple ferroelectric layers and a thin dielectric layer enables high-density data storage with stable retention characteristics. The design leverages the polarization states of the ferroelectric materials to represent different data levels, providing a scalable solution for advanced memory applications. The invention aims to overcome limitations in conventional memory technologies by offering a compact, energy-efficient, and high-capacity storage solution.
3. The N-bit non-volatile multi-level memory cell of claim 2 wherein the first ferroelectric material layer and a second ferroelectric material layer comprise ZrO2.
This invention relates to non-volatile multi-level memory cells using ferroelectric materials for data storage. The technology addresses the need for high-density, low-power memory solutions with multiple data states per cell, improving storage efficiency over traditional binary memory cells. The memory cell includes a structure with at least two ferroelectric material layers, both composed of ZrO2 (zirconium dioxide), which enables stable polarization states for multi-level data storage. The cell is designed to store N bits of data, where N is greater than one, allowing each cell to represent multiple logic states. The ferroelectric layers are engineered to exhibit distinct polarization levels, which can be read and written electrically, providing non-volatile storage. The use of ZrO2 ensures reliable switching between polarization states, enhancing data retention and endurance. This design improves upon conventional memory technologies by increasing storage density while maintaining low power consumption and high reliability. The memory cell operates by applying voltage pulses to switch the polarization states of the ferroelectric layers, which can then be read back to determine the stored data. The invention is particularly useful in applications requiring compact, high-capacity memory solutions, such as embedded systems, solid-state drives, and portable electronics.
4. The N-bit non-volatile multi-level memory cell of claim 3 wherein the first ferroelectric material layer has a thickness of about 1 nm and a second ferroelectric material layer has a thickness of about 1 nm.
This invention relates to non-volatile multi-level memory cells using ferroelectric materials for data storage. The problem addressed is the need for high-density, low-power memory with stable multi-bit storage capabilities. Traditional memory technologies often struggle with scalability and retention issues, particularly in multi-level cells. The memory cell includes a ferroelectric structure with two distinct ferroelectric material layers, each approximately 1 nm thick. These layers are stacked to form a multi-level storage element, allowing the cell to store N bits of data, where N is greater than one. The thin ferroelectric layers enable precise control of polarization states, which correspond to different data states. The cell structure is designed to minimize interference between layers while maintaining high switching efficiency and data retention. The ferroelectric layers are engineered to exhibit distinct polarization characteristics, allowing independent programming and reading of multiple bits within a single cell. The thinness of each layer (1 nm) ensures tight control over polarization switching, reducing power consumption and improving reliability. The cell operates by applying voltage pulses to switch the polarization states of the ferroelectric layers, with each state representing a unique data value. The design also includes mechanisms to prevent cross-talk between layers, ensuring stable multi-bit operation. This approach enhances memory density by storing multiple bits per cell while maintaining low power consumption and high retention, addressing limitations in conventional non-volatile memory technologies.
5. The N-bit non-volatile multi-level memory cell of claim 2 wherein the first ferroelectric material layer comprises HfO2 and the second ferroelectric material layer comprises HfO2.
This invention relates to a non-volatile multi-level memory cell capable of storing N bits of data, addressing the need for high-density, low-power memory solutions with improved data retention and switching performance. The memory cell includes a ferroelectric structure with two distinct ferroelectric material layers, each composed of HfO2, to enhance polarization stability and switching efficiency. The first and second HfO2 layers are stacked to form a composite ferroelectric structure, enabling multi-level data storage by exploiting different polarization states. The use of HfO2 in both layers ensures compatibility with complementary metal-oxide-semiconductor (CMOS) processes, facilitating integration into existing semiconductor manufacturing workflows. The cell operates by applying voltage pulses to switch between stable polarization states, which correspond to different logic states. The dual-layer HfO2 design improves endurance and retention characteristics compared to single-layer ferroelectric cells, making it suitable for high-reliability applications. The memory cell can be integrated into arrays for scalable, high-density storage solutions, addressing limitations in conventional flash memory and dynamic random-access memory (DRAM) technologies. The invention provides a robust, scalable approach to multi-level data storage with enhanced performance and manufacturability.
6. The N-bit non-volatile multi-level memory cell of claim 1 wherein N is equal to 2 providing a first ferroelectric material layer and a second ferroelectric material layer and the at least one dielectric material layer has a thickness of about 5 nm.
This invention relates to a non-volatile multi-level memory cell designed to store multiple bits of data per cell, specifically a 2-bit cell. The memory cell includes two ferroelectric material layers and at least one dielectric material layer with a thickness of approximately 5 nm. The ferroelectric layers enable the cell to store data by exploiting the polarization states of the ferroelectric materials, which can be switched between different states to represent binary data. The dielectric layer provides electrical insulation and structural support between the ferroelectric layers. The combination of these layers allows the cell to operate as a multi-level memory, where each ferroelectric layer can independently store a bit of data, effectively doubling the storage capacity compared to a single-level cell. The precise thickness of the dielectric layer ensures optimal electrical performance and reliability. This design is particularly useful in high-density memory applications where space efficiency and non-volatility are critical. The invention addresses the need for compact, high-capacity memory solutions by leveraging the unique properties of ferroelectric materials to achieve multi-bit storage in a single cell structure.
7. The N-bit non-volatile multi-level memory cell of claim 6 wherein the first ferroelectric material layer and a second ferroelectric material layer comprise ZrO2 and are located on opposite surfaces of the at least one dielectric material layer.
This invention relates to a non-volatile multi-level memory cell capable of storing N bits of data. The memory cell addresses the challenge of increasing data storage density in non-volatile memory devices by utilizing ferroelectric materials to achieve multiple stable polarization states, enabling higher bit storage per cell. The cell includes at least one dielectric material layer sandwiched between two ferroelectric material layers, both composed of ZrO2. These ferroelectric layers are positioned on opposite surfaces of the dielectric layer, allowing for distinct polarization states that can be read and written to store multiple bits of information. The ferroelectric ZrO2 layers exhibit reversible polarization switching, which is essential for reliable data storage and retrieval. The dielectric layer provides electrical insulation while maintaining the structural integrity of the cell. This configuration enhances the memory cell's ability to retain data even when power is removed, making it suitable for non-volatile applications. The use of ZrO2 in both ferroelectric layers ensures compatibility and uniformity in material properties, improving manufacturing consistency and performance. The memory cell's design supports scalable integration into advanced memory architectures, addressing the demand for higher storage density in electronic devices.
8. The N-bit non-volatile multi-level memory cell of claim 7 wherein the first ferroelectric material layer has a thickness of about 1 nm and a second ferroelectric material layer has a thickness of about 1 nm.
This invention relates to non-volatile multi-level memory cells using ferroelectric materials for data storage. The technology addresses the challenge of achieving high-density, low-power memory with stable multi-bit storage capabilities. The memory cell includes a ferroelectric structure with multiple layers to enhance data retention and switching performance. Specifically, the cell features a first ferroelectric material layer and a second ferroelectric material layer, each with a thickness of approximately 1 nm. These layers are designed to store multiple data states by leveraging the polarization properties of ferroelectric materials, allowing for N-bit storage per cell. The thin layers improve switching speed and reduce power consumption while maintaining data integrity. The ferroelectric layers are integrated into a memory cell structure that enables reliable read and write operations. This design supports scalable memory architectures for applications requiring high-density storage, such as embedded systems and solid-state drives. The use of ultra-thin ferroelectric layers ensures efficient polarization switching and minimizes interference between adjacent memory cells, enhancing overall performance and reliability.
9. The N-bit non-volatile multi-level memory cell of claim 6 wherein the first ferroelectric material layer comprises HfO2 and the second ferroelectric material layer comprises HfO2.
This invention relates to a non-volatile multi-level memory cell capable of storing N bits of data, addressing the challenge of increasing data storage density in memory devices. The memory cell includes a ferroelectric memory structure with two distinct ferroelectric material layers, each composed of HfO2 (hafnium oxide). The first and second ferroelectric material layers are stacked to enhance the memory cell's ability to store multiple data states, improving storage capacity and reliability. The cell operates by exploiting the ferroelectric properties of HfO2, which allows for stable polarization states that can be read and written electrically. The use of HfO2 in both layers ensures compatibility and consistent performance, as HfO2 is known for its ferroelectric behavior when doped or processed under specific conditions. The memory cell is designed to retain data even when power is removed, making it suitable for non-volatile applications. The stacked ferroelectric layers enable multi-level storage, where each layer contributes to the overall data storage capability, allowing the cell to represent multiple bits per cell. This design improves memory density and efficiency compared to traditional single-level memory cells. The invention focuses on leveraging the ferroelectric properties of HfO2 to achieve reliable, high-density data storage in non-volatile memory applications.
15. The N-bit non-volatile multi-level memory cell of claim 1 wherein the vertical stack of material layers provides a multi-peak Ec distribution wherein each peak in the multi-peak Ec distribution provides a respective data bit in the MLC.
This invention relates to a non-volatile multi-level memory cell (MLC) designed to store multiple bits of data per cell by utilizing a vertical stack of material layers that creates a multi-peak electron capture (Ec) distribution. The vertical stack is structured to generate distinct peaks in the Ec distribution, where each peak corresponds to a separate data bit. This approach enables higher data storage density by allowing each memory cell to store N bits, where N is determined by the number of distinguishable peaks in the Ec distribution. The vertical stack may include multiple layers of charge-trapping materials or other structures that influence electron capture behavior, ensuring that each peak in the distribution is stable and distinguishable. The invention addresses the challenge of increasing storage capacity in non-volatile memory devices without significantly increasing the physical footprint of individual memory cells. By leveraging the multi-peak Ec distribution, the memory cell can reliably store and retrieve multiple bits of data, improving efficiency and performance in memory storage applications. The vertical stack design ensures that the peaks remain well-separated, minimizing errors during read and write operations. This technology is particularly useful in advanced memory systems where high-density storage is required, such as in solid-state drives, embedded memory, and other non-volatile storage solutions.
16. The N-bit non-volatile multi-level memory cell of claim 15 wherein each of the peaks in the multi-peak Ec distribution is non-overlapping.
This invention relates to non-volatile multi-level memory cells, specifically addressing the challenge of data storage density and reliability in memory devices. The technology involves an N-bit non-volatile multi-level memory cell with a multi-peak electron capture (Ec) distribution, where each peak in the distribution is non-overlapping. This design ensures distinct and separable charge states, improving read accuracy and reducing errors in data retrieval. The memory cell operates by storing multiple bits of data in a single cell through controlled charge trapping mechanisms, where each bit corresponds to a unique charge state represented by a distinct peak in the Ec distribution. The non-overlapping peaks prevent interference between adjacent charge states, enhancing the cell's ability to retain and accurately read stored data over time. This approach increases storage density while maintaining high reliability, making it suitable for advanced memory applications such as flash memory, solid-state drives, and other non-volatile storage systems. The invention focuses on optimizing the charge distribution to minimize errors and improve performance in high-density memory architectures.
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September 25, 2020
December 20, 2022
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