Patentable/Patents/US-11561725
US-11561725

System and operating method thereof

PublishedJanuary 24, 2023
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

Embodiments of the present disclosure relate to a system and an operating method thereof. According to embodiments of the present disclosure, a memory system may transmit a first type response indicating that first data has been cached in a cache to the host when receiving a first command requesting to write the first data from the host, and may transmit a second type response indicating success or failure of an operation of storing the first data in the memory device to the host after transmitting the first type response to the host. Further, the host may delete the first data from a write buffer after the operation of storing the first data in the memory device succeeds.

Patent Claims
9 claims

Legal claims defining the scope of protection, as filed with the USPTO.

3

3. The system of claim 2, wherein the host further retransmits the first command to the memory system when receiving the second type response indicating the failure of the operation of storing the first data in the memory device.

4

4. The system of claim 2, wherein the host further transmits, when receiving the second type response indicating the failure of the operation of storing the first data in the memory device, a third command instructing to respond after the operation of storing the first data in the memory device is completed to the memory system.

5

5. The system of claim 1, wherein the host further clears doorbell information corresponding to the first command when receiving the second type response indicating the success of the operation of storing the first data in the memory device.

6

6. The system of claim 5, wherein the host further retransmits all of the first data to the memory system when receiving the second type response indicating the failure of the operation of storing the first data in the memory device.

7

7. The system of claim 1, wherein the host further clears doorbell information corresponding to the first command and further retransmits the first command to the memory system, when receiving the second type response indicating the failure of the operation of storing the first data in the memory device.

10

10. The operating method of claim 9, further comprising retransmitting, by the host, the first command to the memory system when the host receives the second type response indicating the failure of the operation of storing the first data in the memory device.

11

11. The operating method of claim 9, further comprising transmitting by the host, when the host receives the second type response indicating the failure of the operation of storing the first data in the memory device, a third command instructing to respond after the operation of storing the first data in the memory device is completed to the memory system.

12

12. The operating method of claim 8, further comprising clearing, by the host, doorbell information corresponding to the first command when the host receives the second type response indicating the success of the operation of storing the first data in the memory device.

13

13. The operating method of claim 12, further comprising retransmitting, by the host, all of the first data to the memory system when the host receives the second type response indicating the failure of the operation of storing the first data in the memory device.

Classification Codes (CPC)

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Patent Metadata

Filing Date

June 29, 2021

Publication Date

January 24, 2023

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Cite as: Patentable. “System and operating method thereof” (US-11561725). https://patentable.app/patents/US-11561725

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