Devices, systems and methods for improving the performance of a memory device are described. An example method includes performing, based on a plurality of read voltages, read operations on each of a plurality of pages of a memory device, determining, based on the read operations for each page of the plurality of pages, a ones count in each page and a checksum of an error correcting code for each page, generating a first estimator for the checksum and a second estimator for the ones count based on a polynomial regression, determining, based on the first estimator and the second estimator, an updated plurality of read voltages, and applying the updated plurality of read voltages to the memory device to retrieve information from the memory device.
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2. The method of claim 1, wherein the first estimator for the checksum comprises a product of a maximum value of the checksum and a sigmoid function of a sum of N dcs-degree polynomials corresponding to N read voltages of the plurality of read voltages, wherein N and dcs are positive integers, and wherein coefficients of the N dcs-degree polynomials comprise a first parameter set.
3. The method of claim 2, wherein the sigmoid function is selected from the group consisting of a logistic function, a hyperbolic tangent function, an arctangent function, an error function, and a generalized logistic function.
5. The method of claim 4, wherein the inverse of the sigmoid function is determined using a lookup table (LUT).
6. The method of claim 1, wherein the second estimator for the ones count comprises a sigmoid function of a sum of N dp-degree polynomials corresponding to N read voltages of the plurality of read voltages, wherein N and dp are positive integers, and wherein coefficients of the N dp-degree polynomials comprise a second parameter set.
7. The method of claim 6, wherein the sigmoid function is selected from the group consisting of a logistic function, a hyperbolic tangent function, an arctangent function, an error function, and a generalized logistic function.
9. The method of claim 8, wherein the inverse of the sigmoid function is determined using a lookup table (LUT).
10. The method of claim 1, wherein the first estimator and the second estimator are used to adjust one or more incremental step pulse programming (ISPP) parameters in the memory device.
11. The method of claim 1, wherein the memory device comprises a plurality of cells, and wherein generating the first estimator and the second estimator is independent of a voltage distribution of the plurality of cells.
13. The system of claim 12, wherein the first estimator for the checksum comprises a product of a maximum value of the checksum and a sigmoid function of a sum of N dcs-degree polynomials corresponding to N read voltages of the plurality of read voltages, wherein N and dcs are positive integers, and wherein coefficients of the N dcs-degree polynomials comprise a first parameter set.
15. The system of claim 12, wherein the second estimator for the ones count comprises a sigmoid function of a sum of N dp-degree polynomials corresponding to N read voltages of the plurality of read voltages, wherein N and dp are positive integers, and wherein coefficients of the N dp-degree polynomials comprise a second parameter set.
20. The computer-readable storage medium of claim 19, wherein the updated plurality of read voltages is based on a weighted average of the estimate of the first parameter set and the estimate of the second parameter set.
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June 15, 2021
January 31, 2023
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