Patentable/Patents/US-11569084
US-11569084

Method for manufacturing semiconductor structure with reduced nodule defects

PublishedJanuary 31, 2023
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A method for removing nodule defects is disclosed. The nodule defects may be formed on a non-selected portion of a semiconductor structure during formation of a semiconductor region on a selected portion of the semiconductor structure. A plasma having a higher selectivity to etch the nodule defects relative to the semiconductor region may be used to selectively remove the nodule defects on the non-selected portion.

Patent Claims
15 claims

Legal claims defining the scope of protection, as filed with the USPTO.

2

2. The method of claim 1, wherein the plasma is generated from a gas source including hydrogen.

3

3. The method of claim 2, wherein a flow rate of the hydrogen is controlled in a range from 10 sccm to 2000 sccm.

4

4. The method of claim 2, wherein the gas source further includes a carrier gas selected from helium, argon, and a combination thereof.

5

5. The method of claim 4, wherein a flow rate of the carrier gas is controlled in a range from 50 sccm to 6000 sccm.

6

6. The method of claim 1, wherein the plasma is operated under a temperature ranging from 90° C. to 600° C.

7

7. The method of claim 1, wherein the plasma is operated under a pressure ranging from 0.05 torr to 6 torr.

8

8. The method of claim 1, wherein the plasma is generated by a plasma generation source selected from a transformer-coupled plasma generator, an inductively coupled plasma system, a magnetically enhanced reactive ion etching system, an electron cyclotron resonance system, or a remote plasma generator.

11

11. The method of claim 10, wherein the nodule defects are formed in at least one of forming the first source-drain regions and forming the second source-drain regions, and the plasma has a higher selectivity to etch the nodule defects relative to the first source-drain regions and the second source-drain regions.

12

12. The method of claim 10, wherein the second source-drain regions have a crystalline phase.

13

13. The method of claim 12, wherein the plasma has a high selectivity to etch the amorphous phase relative to the crystalline phase of the first source-drain regions and the crystalline phase of the second source-drain regions.

14

14. The method of claim 11, wherein applying the plasma is implemented before forming the two second recesses and after forming the first source-drain regions.

15

15. The method of claim 11, wherein applying the plasma is implemented after forming the second source-drain regions.

16

16. The method of claim 11, wherein applying the plasma is implemented after each of forming the first source-drain regions and forming the second source-drain regions.

17

17. The method of claim 9, wherein the plasma is generated from a gas source including hydrogen.

20

20. The semiconductor structure of claim 19, wherein each of the source-drain regions has a diamond-like shape structure with the corner which is rounded.

Classification Codes (CPC)

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Patent Metadata

Filing Date

March 11, 2021

Publication Date

January 31, 2023

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Cite as: Patentable. “Method for manufacturing semiconductor structure with reduced nodule defects” (US-11569084). https://patentable.app/patents/US-11569084

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