Patentable/Patents/US-11573189
US-11573189

Systems and methods for monitoring copper corrosion in an integrated circuit device

PublishedFebruary 7, 2023
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

Systems and methods for monitoring copper corrosion in an integrated circuit (IC) device are disclosed. A corrosion-sensitive structure formed in the IC device may include a p-type active region adjacent an n-type active region to define a p-n junction space charge region. A copper region formed over the silicon may be connected to both the p-region and n-region by respective contacts, to thereby define a short circuit. Light incident on the p-n junction space charge region, e.g., during a CMP process, creates a current flow through the metal region via the short circuit, which drives chemical reactions that cause corrosion in the copper region. Due to the short circuit configuration, the copper region is highly sensitive to corrosion. The corrosion-sensitive structure may be arranged with less corrosion-sensitive copper structures in the IC device, with the corrosion-sensitive structure used as a proxy to monitor for copper corrosion in the IC device.

Patent Claims
6 claims

Legal claims defining the scope of protection, as filed with the USPTO.

2

2. The integrated circuit device of claim 1, wherein the metal region comprises a copper region.

8

8. The integrated circuit device of claim 1, wherein the first conductive contact is directly connected to the p-type active region, and the second conductive contact is directly connected to the n-type active region.

10

10. The integrated circuit device of claim 9, wherein the current source is separate from the p-n junction space charge region and supplies the current as a constant current across the metal region.

11

11. The integrated circuit device of Claim 9, wherein the current source and voltage detection circuitry are connected directly to the metal region.

12

12. The integrated circuit device of Claim 9, wherein the current source and voltage detection circuitry are connected to contact regions located in a different metal layer than the metal region and connected to the metal region by vertically-extending conductive contacts.

13

13. The integrated circuit device of claim 9, wherein the first conductive contact is directly connected to the p-type active region, and the second conductive contact is directly connected to the n-type active region.

Classification Codes (CPC)

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Patent Metadata

Filing Date

November 14, 2019

Publication Date

February 7, 2023

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