The invention is directed towards enhanced systems and methods for employing a pulsed photon (or EM energy) source, such as but not limited to a laser, to electrically couple, bond, and/or affix the electrical contacts of a semiconductor device to the electrical contacts of another semiconductor devices. Full or partial rows of LEDs are electrically coupled, bonded, and/or affixed to a backplane of a display device. The LEDs may be μLEDs. The pulsed photon source is employed to irradiate the LEDs with scanning photon pulses. The EM radiation is absorbed by either the surfaces, bulk, substrate, the electrical contacts of the LED, and/or electrical contacts of the backplane to generate thermal energy that induces the bonding between the electrical contacts of the LEDs' electrical contacts and backplane's electrical contacts. The temporal and spatial profiles of the photon pulses, as well as a pulsing frequency and a scanning frequency of the photon source, are selected to control for adverse thermal effects.
Legal claims defining the scope of protection, as filed with the USPTO.
3. The method of claim 2, wherein controlling the thermal effects includes localizing the thermal effects to the first contact, the second contact, and another portion of the uncured UF material that substantially encapsulates the first contact and the second contact.
4. The method of claim 1, wherein the thermal energy deforms the tapered shape of the first contact such that the deformed shape of the first contact is less tapered than the tapered shape of the first contact, and wherein the deformed shaped of the first contact displaces an additional portion of the uncured UF material that substantially encapsulates the first contact.
5. The method of claim 1, wherein the first contact is comprised of nanoporous gold (NPG).
6. The method of claim 1, wherein positioning the semiconductor device proximate to the target substrate is performed at room temperature and at atmospheric pressure.
7. The method of claim 1, wherein the semiconductor device is a first pre-diced semiconductor die included in a first semiconductor wafer and the target substrate is a second pre-diced semiconductor die included in a second semiconductor wafer, and wherein positioning the semiconductor device proximate to the target substrate includes positioning the first semiconductor wafer proximate the second semiconductor wafer.
8. The method of claim 1, wherein the semiconductor device is a micro light emitting diode (μLED) with feature sizes that are less than 100 micrometers (μm) and the target substrate is a backplane of a display device.
10. The method of claim 1, wherein positioning the semiconductor device proximate to the target substrate forms a void disposed between the uncured UF material and the first surface, and wherein providing the thermal energy increases a volume of the uncured UF material to displace the void.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
January 21, 2020
February 7, 2023
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