A memory controller coupled to a memory device and a host device and configured to control access operations of the memory device includes a buffer memory, a host interface, a microprocessor and a data protection engine. The host interface is coupled to the host device and configured to write data received from the host device into the buffer memory and issue a buffer memory write complete notification after the data has been written in the buffer memory. The microprocessor is configured to trigger a data protection operation in response to the buffer memory write complete notification. The protection engine is configured to perform the data protection operation to generate corresponding protection information according to the data written in the buffer memory. The microprocessor is configured to directly trigger the data protection operation after confirming that the data has been written in the buffer memory.
Legal claims defining the scope of protection, as filed with the USPTO.
2. The memory controller of claim 1, wherein the data received from the host device comprises a plurality of portions, and the microprocessor is configured to directly drive the data protection engine to perform the data protection operation on each portion of the data after confirming that the portion of the data has been written in the buffer memory.
3. The memory controller of claim 1, wherein in response to the buffer memory write complete notification, the microprocessor is configured to drive the data protection engine to perform the data protection operation while drive the memory interface to perform the data write operation at the same time.
4. The memory controller of claim 1, wherein performance time of the data protection operation corresponding to the data and performance time of the data write operation corresponding to the data are overlapped.
5. The memory controller of claim 1, wherein the microprocessor is configured to drive the data protection engine to perform the data protection operation corresponding to the data before the data write operation corresponding to the data is completed.
7. The data processing method of claim 6, wherein the data received from the host device comprises a plurality of portions, and a data protection engine of the memory controller is directly driven to perform the data protection operation on each portion of the data after the portion of the data has been written in the buffer memory.
8. The data processing method of claim 6, wherein the data protection operation corresponding to the data and the data write operation corresponding to the data are performed at the same time.
9. The data processing method of claim 6, wherein performance time of the data protection operation corresponding to the data and performance time of the data write operation corresponding to the data are overlapped.
10. The data processing method of claim 6, wherein the data protection operation corresponding to the data is performed before the data write operation corresponding to the data is completed.
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May 25, 2021
May 23, 2023
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