Patentable/Patents/US-11663034
US-11663034

Permitting unaborted processing of transaction after exception mask update instruction

PublishedMay 30, 2023
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A data processing apparatus has processing circuitry with transactional memory support circuitry to support execution of a transaction using transactional memory. In response to an exception mask updating instruction which updates exception mask information to enable at least one subset of exceptions which was disabled at the start of processing of a transaction, the processing circuitry permits un-aborted processing of one or more subsequent instruction of the transaction that follow the exception mask update instruction.

Patent Claims
7 claims

Legal claims defining the scope of protection, as filed with the USPTO.

2

2. The apparatus according to claim 1, wherein the hardware transactional memory support circuitry comprises restoration state storage circuitry to store transaction restoration state data captured in response to the transaction start instruction.

3

3. The apparatus according to claim 2, wherein the processing circuitry is configured to restore the transaction restoration state data in response to said abort event.

5

5. The apparatus according to claim 2, wherein said transaction restoration state data comprises said exception mask information.

6

6. The apparatus according to claim 1, wherein the exception mask information specifies, separately for a plurality of types of exception, whether each type of exception is enabled or disabled.

7

7. The apparatus according to claim 1, wherein the exception mask information specifies an exception priority threshold, and the exception handling circuitry is configured to determine whether to mask an exception depending on a comparison between a priority level of the exception and the exception priority threshold.

9

9. The apparatus according to claim 1, wherein the hardware transactional memory support circuitry comprises conflict detection circuitry to detect a conflict between a data access to a given address made within the transaction of a first thread and a data access to the same address made by another thread.

10

10. The apparatus according to claim 9, wherein the conflict detection circuitry is configured to trigger said abort event in response to detection of the conflict.

Classification Codes (CPC)

Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.

Patent Metadata

Filing Date

August 21, 2018

Publication Date

May 30, 2023

Want to explore more patents?

Browse 5M+ US patents with plain-English claim translations and AI-generated analysis.

Citation & reuse

Analysis on this page is generated by Patentable — an AI-powered patent intelligence platform. AI-generated summaries, explanations, and analysis may be reused with attribution and a visible link back to the canonical URL below. Patent abstracts and claims are USPTO public domain.

Cite as: Patentable. “Permitting unaborted processing of transaction after exception mask update instruction” (US-11663034). https://patentable.app/patents/US-11663034

© 2026 Patentable. All rights reserved.

Patentable is a research and drafting-assistant tool, not a law firm, and does not provide legal advice. Documents we generate are drafts for review by a licensed patent attorney.