Patentable/Patents/US-11665916
US-11665916

Memory devices and methods for forming the same

PublishedMay 30, 2023
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A memory device includes a substrate, a buried word line, a connecting structure, an air gap, and a first dielectric layer. The buried word line is disposed in the substrate. The connecting structure is disposed on the buried word line. The air gap is disposed on the buried word line and is adjacent to the connecting structure. The first dielectric layer is disposed on the connecting structure and the air gap, wherein the buried word line, the connecting structure, and the first dielectric layer are disposed in the first direction, which is substantially perpendicular to the top surface of the substrate.

Patent Claims
16 claims

Legal claims defining the scope of protection, as filed with the USPTO.

2

2. The memory device as claimed in claim 1, wherein the connecting structure comprises a conductive material.

3

3. The memory device as claimed in claim 1, wherein a bottom surface of the connecting structure is smaller than the top surface of the buried word line.

4

4. The memory device as claimed in claim 1, wherein the first portion of the air gap is on both sides of the connecting structure.

5

5. The memory device as claimed in claim 1, wherein the second portion of the air gap is between the sidewall of the buried word line and the substrate.

6

6. The memory device as claimed in claim 1, wherein a width of the first dielectric layer is greater than a width of the buried word line.

7

7. The memory device as claimed in claim 1, wherein the connecting structure is in direct contact with the buried word line and the first dielectric layer.

8

8. The memory device as claimed in claim 1, wherein the buried word line, the connecting structure and the air gap are disposed in a trench, and wherein the memory device further comprises a second dielectric layer disposed on a sidewall of the trench.

9

9. The memory device as claimed in claim 8, further comprising a liner disposed between the second dielectric layer and the buried word line.

10

10. The memory device as claimed in claim 9, wherein the liner and the first dielectric layer are separated by the air gap.

13

13. The method as claimed in claim 12, wherein the first material layer and the second material layer comprise the same conductive material.

14

14. The method as claimed in claim 11, wherein the first portion of the air gap is adjacent to both sides of the connecting structure.

15

15. The method as claimed in claim 11, wherein the first dielectric layer covers a top portion of the connecting structure.

16

16. The method as claimed in claim 11, wherein the sacrificial structure comprises a dielectric material.

18

18. The method as claimed in claim 17, further comprising conformally forming a liner in the trench before forming the buried word line, wherein a top surface of the liner is lower than the top surface of the buried word line.

19

19. The method as claimed in claim 18, further comprising forming a second dielectric layer in the trench before forming the liner, wherein a top surface of the second dielectric layer is higher than the top surface of the connecting structure.

20

20. The method as claimed in claim 19, wherein forming the second dielectric layer comprises oxidizing a portion of the substrate.

Classification Codes (CPC)

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Patent Metadata

Filing Date

February 12, 2020

Publication Date

May 30, 2023

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Cite as: Patentable. “Memory devices and methods for forming the same” (US-11665916). https://patentable.app/patents/US-11665916

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