Patentable/Patents/US-11681619
US-11681619

Controller and operation method thereof for managing read count information of memory block

PublishedJune 20, 2023
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A method for performing a sudden power-off recovery operation of a controller controlling a memory device, the method includes: obtaining open block information for open blocks of the memory device and read counts for the open blocks; updating each of the read counts by adding a set value to each of the read counts; storing the updated read counts in the memory device; sequentially reading pages in each of the open blocks without updating the read counts for the open blocks, based on the open block information, to detect a boundary page after the storing of the updated read counts in the memory device; and controlling the memory device to program dummy data in the detected boundary page.

Patent Claims
9 claims

Legal claims defining the scope of protection, as filed with the USPTO.

2

2. The method of claim 1, wherein the expected read count includes a maximum read count of read operations that are performed in one open block.

3

3. The method of claim 1, wherein the expected read count includes an average read count of read operations that are performed in one open block.

4

4. The method of claim 1, wherein the boundary page search scheme includes a linear search scheme.

5

5. The method of claim 1, wherein the boundary page search scheme includes a binary search scheme.

9

9. The controller of claim 8, wherein the expected read count includes a maximum read count of read operations that are performed in one open block.

10

10. The controller of claim 8, wherein the expected read count includes an average read count of read operations that are performed in one open block.

11

11. The controller of claim 8, wherein the boundary page search scheme includes a linear search scheme.

12

12. The controller of claim 8, wherein the boundary page search scheme includes a binary search scheme.

14

14. The controller of claim 13, wherein the processor generates the free block by erasing a memory block in which only invalid data are stored.

Classification Codes (CPC)

Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.

Patent Metadata

Filing Date

September 1, 2021

Publication Date

June 20, 2023

Want to explore more patents?

Browse 5M+ US patents with plain-English claim translations and AI-generated analysis.

Citation & reuse

Analysis on this page is generated by Patentable — an AI-powered patent intelligence platform. AI-generated summaries, explanations, and analysis may be reused with attribution and a visible link back to the canonical URL below. Patent abstracts and claims are USPTO public domain.

Cite as: Patentable. “Controller and operation method thereof for managing read count information of memory block” (US-11681619). https://patentable.app/patents/US-11681619

© 2026 Patentable. All rights reserved.

Patentable is a research and drafting-assistant tool, not a law firm, and does not provide legal advice. Documents we generate are drafts for review by a licensed patent attorney.