Patentable/Patents/US-11682463
US-11682463

Memory device

PublishedJune 20, 2023
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A memory device includes a voltage generator that provides a read voltage to a selected word line and provides a pass voltage to a plurality of unselected word lines, and a deterioration level detection circuit. The selected word line and the unselected word lines are connected to a plurality of memory cells. The deterioration level detection circuit detects a deterioration level of memory cells connected to the selected word line based on data of memory cells that receive the read voltage. The memory cells connected to the selected word line and the memory cells that receive the read voltage are included in the plurality of memory cells. The voltage generator changes the pass voltage provided to the unselected word lines based on the deterioration level.

Patent Claims
6 claims

Legal claims defining the scope of protection, as filed with the USPTO.

3

3. The memory device of claim 2, wherein the at least one page that receives the pass voltage having been changed is disposed on a side based on the selected word line.

4

4. The memory device of claim 3, wherein the pass voltage is received by a plurality of pages, the pages that receive the pass voltage are sequentially disposed, and the read operation is performed in an arrangement direction of the sequentially disposed pages.

5

5. The memory device of claim 1, wherein the pass voltage changing circuit provides the pass voltage having been changed to all of the pages connected to the unselected word lines.

6

6. The memory device of claim 1, wherein the pass voltage changing circuit provides the pass voltage having been changed to pages disposed adjacent to the page connected to the selected word line, wherein the pages disposed adjacent to the page connected to the selected word line are included in the unselected word lines.

7

7. The memory device of claim 1, wherein the degradation level is provided by a memory controller that communicates with the memory device.

10

10. The memory device of claim 9, wherein the voltage generator is configured to provide a third pass voltage varied according to the degradation level detected during the second time period to the unselected word lines during a third time period in which a third bit of the selected memory cell is read.

Classification Codes (CPC)

Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.

Patent Metadata

Filing Date

August 20, 2021

Publication Date

June 20, 2023

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Cite as: Patentable. “Memory device” (US-11682463). https://patentable.app/patents/US-11682463

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