Method of programming and verifying memory device and related memory device

3. The memory device of claim 2, wherein each of the first and second program voltages comprises a series of programming voltage pulses incremented by the respective first or second amount, and wherein the series of programming voltage pulses is in a form of a staircase waveform starting from an initial voltage level.

4. The memory device of claim 3, wherein the initial voltage level of the second program voltage is larger than the initial voltage level of the first program voltage.

7. The memory device of claim 6, wherein the verify current comprises a first verify current associated with the first word line programmed by the first program voltage, and a second verify current associated with the second word line programmed by the first program voltage, and the second verify current is smaller than the first verify current.

8. The memory device of claim 7, wherein the first program voltage is incremented by a first amount, and the second program voltage is incremented by a second amount smaller than the first amount, and each of the first and second program voltages comprises a series of programming voltage pulses incremented by the respective first or second amount.

9. The memory device of claim 8, wherein the series of programming voltage pulses is in a form of a staircase waveform starting from an initial voltage level.

10. The memory device of claim 9, wherein the initial voltage level of the second program voltage is larger than the initial voltage level of the first program voltage.

11. The memory device of claim 8, wherein the controller is further configured to instruct the word line driver to apply a verify voltage to the respective first or second selected word line between two adjacent program voltage pulses.