Patentable/Patents/US-11749373
US-11749373

Bad block management for memory sub-systems

PublishedSeptember 5, 2023
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

Patent Claims
5 claims

Legal claims defining the scope of protection, as filed with the USPTO.

6

6. The system of claim 5, wherein storing the system data to the block from the first pool of blocks at the single bit per memory cell further comprises storing the system data at a single-level cell (SLC) mode, and wherein storing the user data to the block from the second pool of blocks at the plurality of bits per memory cell further comprises storing the user data by using a programming operation that stores a plurality of bits per each memory cell.

7

7. The system of claim 5, wherein the system data corresponds to a characteristic of the memory sub-system at a time when the user data is stored at the memory sub-system.

13

13. The method of claim 12, wherein storing the system data to the block from the first pool of blocks at the single bit per memory cell further comprises storing the system data at a single-level cell (SLC) mode, and wherein storing the user data to the block from the second pool of blocks at the plurality of bits per memory cell further comprises storing the user data by using a programming operation that stores a plurality of bits per each memory cell.

14

14. The method of claim 12, wherein the system data corresponds to a characteristic of the memory sub-system at a time when the user data is stored at the memory sub-system.

20

20. The non-transitory computer-readable storage medium of claim 19, wherein the system data corresponds to a characteristic of the memory sub-system at a time when the user data is stored at the memory sub-system.

Patent Metadata

Filing Date

Unknown

Publication Date

September 5, 2023

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Cite as: Patentable. “Bad block management for memory sub-systems” (US-11749373). https://patentable.app/patents/US-11749373

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