Legal claims defining the scope of protection, as filed with the USPTO.
2. The semiconductor device of claim 1, wherein the frame has a first bottom surface and a second bottom surface higher than the first bottom surface, the second bottom surface of the frame at least partially define the channel, and the channel laterally penetrates through the frame.
5. The semiconductor device of claim 1, further comprising an additional channel disposed at the bottom of the frame and extending from the outer sidewall to another outer sidewall of the frame.
7. The semiconductor device of claim 6, wherein the channel is recessed from a bottommost surface of the frame and toward a top surface of the frame.
8. The semiconductor device of claim 6, wherein the channel is configured for discharging fluid from the through hole and the cavity out of the semiconductor device.
9. The semiconductor device of claim 6, further comprising a conductive liner lining surfaces of the through hole and the cavity.
10. The semiconductor device of claim 6, wherein the through hole further penetrates into a portion of the frame.
11. The semiconductor device of claim 6, further comprising a bonding structure between the frame and the substrate.
12. The semiconductor device of claim 6, wherein the at least one channel comprises a plurality of channels around four sides of the cavity.
13. The semiconductor device of claim 6, wherein the channel has a curved surface.
14. The semiconductor device of claim 6, wherein the at least one channel comprises a plurality of channels configured as a grid pattern.
18. The semiconductor device of claim 17, further comprising a bonding structure between the frame and the substrate.
19. The semiconductor device of claim 15, wherein the channel is configured for discharging fluid from the through hole and the cavity out of the semiconductor device.
20. The semiconductor device of claim 15, wherein the channel has a curved surface.
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September 26, 2023
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