Die backend diodes for electrostatic discharge (ESD) protection

2. The die of claim 1, wherein the backend further comprises an interconnect stack including a plurality of layers of inter-layer dielectric (ILD) materials, each layer including a metal layer forming conductive elements therein, at least one conductive element including the signal line, and another conductive element including the ground line.

3. The die of claim 2, wherein the ILD materials comprise one or more compounds of silicon and at least one of oxygen, nitrogen, and carbon.

4. The die of claim 2, wherein each layer comprises a different ILD material.

5. The die of claim 1, wherein the frontend comprises one or more semiconductor materials including at least one of silicon, germanium, gallium, arsenic, indium, phosphorus, and nitrogen.

6. The die of claim 1, wherein the first diode is p-doped and the second diode is n-doped.

7. The die of claim 1, wherein the first diode and the second diode are p-doped.

8. The die of claim 1, wherein the first contact is directly coupled to the first conductive trace, and the second contact is directly coupled to the signal line.

9. The die of claim 1, wherein the first contact comprises at least one of molybdenum, platinum, nickel, chromium, tungsten, palladium and gold.

12. The ESD protection structure of claim 10, wherein the first diode and the second diode comprise p-doped semiconductor material.

15. The ESD protection structure of claim 10, wherein each of the first diode and the second diode includes an ohmic contact, a Schottky contact, and a semiconductor material between the ohmic contact and the Schottky contact.

18. The IC package of claim 17, wherein the ILD material surrounds the at least two diodes, the first conductive pathway and the second conductive pathway.

19. The IC package of claim 17, wherein the at least two diodes are in different layers of the ILD material.

20. The IC package of claim 17, wherein the first conductive pathway and the second conductive pathway are coupled to a frontend of the IC die, the frontend including a transistor.