Electronic device comprising a memory accessible via a JTAG interface, and corresponding method of accessing a memory

2. The electronic device of claim 1, wherein said set of input binary values comprises eight binary values, and said first subset of input binary values comprises four adjacent binary values in said set of input binary values, and said second subset of input binary values comprises another four adjacent binary values in said set of input binary values.

3. The electronic device of claim 1, wherein said serial communication interface comprises a universal asynchronous receiver-transmitter (UART) interface.

5. The electronic device of claim 4, wherein said serial communication interface is configured to operate in half-duplex mode to receive said serial data input signal and transmit said serial data output signal via a single data line.

6. The electronic device of claim 4, wherein said serial communication interface is configured to operate in full-duplex mode to receive said serial data input signal via a respective input data line and transmit said serial data output signal via a respective output data line.

9. The method of claim 8, wherein said set of input binary values comprises eight binary values, and said first subset of input binary values comprises four adjacent binary values in said set of input binary values, and said second subset of input binary values comprises another four adjacent binary values in said set of input binary values.

11. The electronic device of claim 10, wherein said set of input binary values comprises eight binary values.

12. The electronic device of claim 10, wherein said serial communication interface comprises a universal asynchronous receiver-transmitter (UART) interface.