Semiconductor device and method for fabricating the same

2. The semiconductor device of claim 1, wherein each of the isolation layers further includes a capping layer on the air gap.

3. The semiconductor device of claim 2, wherein the capping layer includes silicon oxide having a bad step coverage.

4. The semiconductor device of claim 1, wherein the capping layer is one of USG oxide, TEOS oxide, or HDP oxide.

5. The semiconductor device of claim 1, wherein each of the isolation layers has a width narrower than that of the fin body.

6. The semiconductor device of claim 1, wherein an upper surface of the fin body and an upper surface of each of the isolation layers are at a same level.

7. The semiconductor device of claim 1, wherein an upper surface of the fin is at a level higher than upper surfaces of the isolation layers.

8. The semiconductor device of claim 1, wherein the fin body and the fin are made of different materials.

9. The semiconductor device of claim 1, wherein a stacked structure of the fin/the fin body is one of stacked structures of semiconductor materials among SiGe/Si, Ge/Si, high concentration SiGe/low concentration SiGe, GeSn/Ge, and Sn/Ge.

10. The semiconductor device of claim 1, wherein the source/drain region includes the fin on both sides of the gate structure and an epitaxial layer grown from the fin.

11. The semiconductor device of claim 10, wherein the epitaxial layer is formed through selective epitaxial growth.

12. The semiconductor device of claim 10, wherein the epitaxial layer includes a same material as the fin.

13. The semiconductor device of claim 10, wherein the source/drain region further includes the impurities doped in the fin and the epitaxial layer.