A method includes determining a programmed threshold voltage for a select gate of a memory string and assigning the select gate a programmed reliability rank based upon the programmed threshold voltage. The programmed reliability rank indicates that hot data, warm data, and/or or cold data are programmable to the memory string. The method further includes incrementing a quality characteristic count to a first check voltage value, determining a first checked threshold voltage for the select gate at the first check voltage value, and assigning the select gate a first reliability rank based upon the first checked threshold voltage. The first reliability rank indicates that the warm data or the cold data, or both, are programmable to the memory string.
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4. The method of claim 3, wherein the first checked threshold voltage is greater than the programmed threshold voltage, the second checked threshold voltage is greater than the first checked threshold voltage, and the third checked threshold voltage is greater than the second checked threshold voltage.
5. The method of claim 3, wherein the first checked threshold voltage is less than the programmed threshold voltage, the second checked threshold voltage is less than the first checked threshold voltage, and the third checked threshold voltage is less than the second checked threshold voltage.
6. The method of claim 1, wherein the quality characteristic count is based, at least in part, on a quantity of program-erase cycles (PEC) and a quantity of sense operations performed by the memory string.
7. The method of claim 1, wherein the select gate is programmable.
9. The apparatus of claim 8, wherein the first reliability rank indicates that the first select gate and the second select gate of the memory string have degraded as compared to the first select gate and the second select gate having the respective first select gate programmed reliability rank and the second select gate programmed reliability rank.
11. The apparatus of claim 10, wherein the second reliability rank indicates that the first select gate and the second select gate of the memory string have degraded as compared to the first select gate and the second select gate having the first reliability rank.
13. The apparatus of claim 12, wherein the third reliability rank indicates that the first select gate and the second select gate of the memory string have degraded as compared to the first select gate and the second select gate having the second reliability rank.
14. The apparatus of claim 8, wherein the first select gate and the second select gate are connected in series.
15. The apparatus of claim 8, wherein the quality characteristic count is based, at least in part, on a combination of a quantity of program-erase cycles (PEC) and a quantity of sense operation performed by the memory string.
19. The system of claim 16, wherein the first select gate and the second select gate of the memory string are connected in series.
20. The system of claim 16, wherein the processor is to assign either the first select gate or the second select gate of another memory string a first reliability rank based upon a lower first checked threshold voltage reliability for the first select gate or the second select gate of the another memory string, wherein the first reliability rank indicates that the warm data or the cold data, or both, are programmable to the another memory string.
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February 11, 2022
January 16, 2024
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