A semiconductor device structure is provided. The device includes one or more first semiconductor layers, and a dipole layer surrounding each first semiconductor layer of the one or more first semiconductor layers, wherein the dipole layer comprises germanium. The structure also includes a capping layer surrounding and in contact with the dipole layer, wherein the capping layer comprises silicon, one or more second semiconductor layers disposed adjacent the one or more first semiconductor layers. The structure further includes a gate electrode layer surrounding each first semiconductor layer of the one or more first semiconductor layers and each second semiconductor layer of the one or more second semiconductor layers.
Legal claims defining the scope of protection, as filed with the USPTO.
6. The method of claim 5, wherein the capping layer comprises silicon.
8. The method of claim 5, wherein the capping layer is formed by oxidizing an outer portion of the dipole layer.
9. The method of claim 8, wherein the outer portion of the dipole layer has a concentration of germanium in a range of about 20 atomic percent to about 50 atomic percent.
13. The method of claim 12, wherein the capping layer comprises silicon.
14. The method of claim 12, wherein the first interfacial layer is formed by oxidizing an outer portion of the capping layer.
18. The method of claim 16, wherein the first interfacial layer is germanium oxide and the second interfacial layer is silicon oxide.
19. The method of claim 16, wherein the first interfacial layer and the second interfacial layer comprises the same material.
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March 30, 2021
February 6, 2024
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