A power supplying circuit includes a first high-voltage switch, a first low-voltage switch, a second high-voltage switch, a second low-voltage switch, and a controller circuit. The first high-voltage switch receives a first input voltage and generates a first node voltage. The first low-voltage switch is coupled between the first high-voltage switch and an output terminal. The second high-voltage switch receives a second input voltage and generates a second node voltage. The second low-voltage switch is coupled between the second high-voltage switch and the output terminal. The controller circuit controls the first high-voltage switch, the first low-voltage switch, the second high-voltage switch, and the second low-voltage switch according to the first node voltage and the second node voltage such that an output voltage is outputted to the output terminal.
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2. The power supplying circuit of claim 1, wherein a withstand voltage of the first high-voltage switch is higher than a withstand voltage of the first low-voltage switch, and a withstand voltage of the second high-voltage switch is higher than a withstand voltage of the second low-voltage switch.
3. The power supplying circuit of claim 2, wherein the withstand voltage of the first high-voltage switch or the withstand voltage of the second high-voltage switch is equal to or higher than 20 volts, wherein the withstand voltage of the first low-voltage switch or the withstand voltage of the second low-voltage switch is equal to or lower than 5 volts.
4. The power supplying circuit of claim 1, wherein the first high-voltage switch and the second high-voltage switch are implemented by N-type transistors, wherein the first low-voltage switch and the second low-voltage switch are implemented by P-type transistors.
5. The power supplying circuit of claim 1, wherein the low-voltage comparator is implemented with a voltage hysteresis mechanism.
6. The power supplying circuit of claim 1, wherein when the second node voltage is higher than the first node voltage and the difference between the second node voltage and the first node voltage is greater than the threshold voltage, the low-voltage comparator outputs the comparison result signal with a second logic value.
8. The power supplying circuit of claim 7, wherein when the second enable signal has the enable level, the low-voltage controller turns on the second low-voltage switch.
9. The power supplying circuit of claim 1, wherein the low-voltage controller comprises a gate voltage modulator circuit, and the gate voltage modulator circuit is configured to control the first high-voltage switch and the second high-voltage switch.
13. The power supplying method of claim 12, wherein a withstand voltage of the first high-voltage switch is higher than a withstand voltage of the first low-voltage switch, and a withstand voltage of the second high-voltage switch is higher than a withstand voltage of the second low-voltage switch.
14. The power supplying method of claim 13, wherein the withstand voltage of the first high-voltage switch or the withstand voltage of the second high-voltage switch is equal to or higher than 20 volts, wherein the withstand voltage of the first low-voltage switch or the withstand voltage of the second low-voltage switch is equal to or lower than 5 volts.
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June 23, 2022
February 13, 2024
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