A parity generation operation based on a set of multiple planes of host data is executed to generate a set of multi-page parity data. The set of multi-page parity data is stored in a cache memory of a memory device. A data recovery operation is performed based on the set of multi-page parity data.
Legal claims defining the scope of protection, as filed with the USPTO.
2. The method of claim 1, further comprising receiving, by the processing device, the host data to be written to a storage area comprising the set of multiple planes.
3. The method of claim 1, further comprising generating the set of multi-plane parity data associated with the host data.
4. The method of claim 3, wherein the multi-plane multi-sub-block parity data is generated by executing an exclusive or (XOR) operation, and wherein the multi-plane multi-sub-block parity data comprises a set of XOR parity values.
5. The method of claim 3, further comprising storing the multi-plane multi-sub-block parity data in the cache memory of the memory device.
6. The method of claim 3, wherein the multi-plane multi-sub-block parity data is generated based on a portion of the set of multiple planes comprising less than a total number of planes of the host data.
8. The non-transitory computer readable medium of claim 7, the operations further comprising receiving, by the processing device, the host data to be written to a storage area comprising the set of multiple planes.
9. The non-transitory computer readable medium of claim 7, the operations further comprising generating the set of multi-plane parity data associated with the host data.
10. The non-transitory computer readable medium of claim 9, wherein the multi-plane multi-sub-block parity data is generated by executing an exclusive or (XOR) operation, and wherein of multi-plane multi-sub-block parity data comprises a set of XOR parity values.
11. The non-transitory computer readable medium of claim 9, the operations further comprising storing the multi-plane multi-sub-block parity data in the cache memory of the memory device.
12. The non-transitory computer readable medium of claim 9, wherein the multi-plane multi-sub-block parity data is generated based on a portion of the set of multiple planes comprising less than a total number of planes of the host data.
14. The system of claim 13, the operations further comprising receiving, by the processing device, the host data to be written to a storage area comprising the set of multiple planes.
15. The system of claim 13, the operations further comprising generating the set of multi-plane parity data associated with the host data.
16. The system of claim 15, wherein the multi-plane multi-sub-block parity data is generated by executing an exclusive or (XOR) operation, and wherein the multi-plane multi-sub-block parity data comprises a set of XOR parity values.
17. The system of claim 13, the operations further comprising storing the multi-plane multi-sub-block parity data in the cache memory of the memory device.
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May 2, 2022
February 20, 2024
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