A method includes depositing a dielectric layer over a substrate, forming carbon nanotubes on the dielectric layer, forming a dummy gate stack on the carbon nanotubes, forming gate spacers on opposing sides of the dummy gate stack, and removing the dummy gate stack to form a trench between the gate spacers. The carbon nanotubes are exposed to the trench. The method further includes etching a portion of the dielectric layer underlying the carbon nanotubes, with the carbon nanotubes being suspended, forming a replacement gate dielectric surrounding the carbon nanotubes, and forming a gate electrode surrounding the replacement gate dielectric.
Legal claims defining the scope of protection, as filed with the USPTO.
4. The method of claim 1, wherein the forming the carbon nanotubes comprises transferring the carbon nanotubes onto the dielectric layer.
7. The method of claim 1, wherein the removing the dummy gate stack to form the trench comprises an isotropic etching process.
8. The method of claim 1, wherein the etching the portion of the dielectric layer underlying the carbon nanotubes comprises an isotropic etching process.
10. The method of claim 9 further comprising etching some portions of the dielectric layer underlying the plurality of carbon nanotubes, so the plurality of carbon nanotubes are suspended.
11. The method of claim 9, wherein the gate dielectric comprises an interfacial layer encircling the plurality of carbon nanotubes, and a high-k dielectric layer encircling the interfacial layer, and wherein portions of the interfacial layer encircling different ones of the carbon nanotubes are physically joined.
15. The method of claim 14, wherein the gate electrode fully encircles the gate dielectric.
16. The method of claim 14, wherein after the portion of the dielectric layer is removed by the etching the dielectric layer, a void is formed to encircle portions of the plurality of carbon nanotubes that were in physical contact with the dielectric layer.
17. The method of claim 14, wherein a bottom portion of the gate stack extends directly underlying the gate spacer.
19. The method of claim 18, wherein the etching the contact etch stop layer stops on the dielectric layer.
20. The method of claim 14, wherein each of the plurality of carbon nanotubes is separated from other ones of the plurality of carbon nanotubes by portions of the gate dielectric.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
May 5, 2021
March 12, 2024
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