Patentable/Patents/US-11937515
US-11937515

MRAM structure for balanced loading

PublishedMarch 19, 2024
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

Semiconductor device and methods of forming the same are provided. A semiconductor device according to one embodiment includes a dielectric layer including a top surface, a plurality of magneto-resistive memory cells disposed in the dielectric layer and including top electrodes, a first etch stop layer disposed over the dielectric layer, a common electrode extending through the first etch stop layer to be in direct contact with the top electrodes, and a second etch stop layer disposed on the first etch stop layer and the common electrode. Top surfaces of the top electrodes are coplanar with the top surface of the dielectric layer.

Patent Claims
11 claims

Legal claims defining the scope of protection, as filed with the USPTO.

3

3. The method of claim 2, wherein the first ESL comprises silicon nitride or silicon carbonitride.

4

4. The method of claim 2, wherein the second ESL comprises aluminum oxide, zirconium oxide, or hafnium oxide.

5

5. The method of claim 2, wherein the first ESL comprises a thickness between about 50 Å and about 200 Å.

6

6. The method of claim 2, wherein the second ESL comprises a thickness between about 20 Å and about 100 Å.

7

7. The method of claim 1, wherein a total thickness of the first ESL and the second ESL is between about 200 Å and about 300 Å.

8

8. The method of claim 1, wherein the common electrode comprises titanium nitride (TiN), tantalum nitride (TaN), aluminum (Al), tungsten (W), nickel (Ni), titanium (Ti), ruthenium (Ru), cobalt (Co), platinum (Pt), or copper (Cu).

12

12. The method of claim 11, wherein a total thickness of the third ESL and the fourth ESL is between about 100 Å and about 200 Å.

13

13. The method of claim 11, wherein the third ESL comprises a thickness between about between about 20 Å and about 100 Å.

14

14. The method of claim 11, wherein the fourth ESL comprises a thickness between about 10 Å and about 50 Å.

18

18. The method of claim 17, wherein a thickness of the first etch stop layer is greater than a thickness of the second etch stop layer.

20

20. The method of claim 19, wherein a thickness of the first nitrogen-containing layer is greater than a thickness of the second nitrogen-containing layer.

Classification Codes (CPC)

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Patent Metadata

Filing Date

August 9, 2022

Publication Date

March 19, 2024

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Cite as: Patentable. “MRAM structure for balanced loading” (US-11937515). https://patentable.app/patents/US-11937515

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