A first driver circuit is configured to cooperate with a second driver circuit to control a display panel, wherein the first driver circuit is configured to output display data to a first area of the display panel and the second driver circuit is configured to output display data to a second area of the display panel. A method used for the first driver circuit includes outputting at least one emission control signal to control the second area of the display panel when the second driver circuit is disabled.
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3. The method of claim 2, wherein the second driver circuit is configured to output the second emission control clock to control the second area of the display panel with the first driver circuit in common.
A display system includes a display panel divided into multiple areas, each controlled by separate driver circuits. The system addresses the challenge of efficiently managing power consumption and performance in large or high-resolution displays by dynamically adjusting emission control signals to different areas of the display. The first driver circuit generates a first emission control clock to drive a first area of the display panel. A second driver circuit generates a second emission control clock to drive a second area of the display panel, sharing the first driver circuit for common control functions. This shared configuration reduces hardware complexity and power consumption while maintaining independent control over each display area. The emission control clocks regulate the timing of light emission in the display, allowing for precise control over brightness and power efficiency. The system may include additional driver circuits for further display areas, each sharing the first driver circuit for common functions. This modular approach enables scalable and efficient display control, particularly useful in large-screen or high-resolution applications.
5. The method of claim 4, wherein the second driver circuit is configured to output the emission control clock to control the first area and the second area of the display panel with the first driver circuit in common.
A display system includes a display panel divided into multiple areas, such as a first area and a second area, and a driver circuit system for controlling light emission in these areas. The system addresses the challenge of efficiently managing power consumption and synchronization in large or segmented display panels. The first driver circuit generates an emission control signal to regulate light emission in the first area. The second driver circuit produces an emission control clock signal, which is shared between the first and second areas of the display panel. This shared clock signal ensures synchronized operation between the areas while reducing circuit complexity and power usage. The emission control clock signal may be distributed to multiple areas, allowing coordinated control of light emission across the entire display panel. This approach simplifies the driver architecture by eliminating the need for separate clock generation circuits for each area, thereby improving efficiency and reducing hardware costs. The system is particularly useful in high-resolution or large-format displays where precise timing and power management are critical.
7. The method of claim 1, wherein the second driver circuit is configured to pull an output terminal of the emission start pulse to a high level when the second driver circuit is disabled.
This invention relates to driver circuits for controlling emission start pulses in display systems, particularly addressing issues related to signal integrity and power consumption. The technology involves a system with at least two driver circuits that generate and manage emission start pulses, which are critical for controlling the timing of light emission in display panels. The problem being solved is ensuring proper signal levels when driver circuits are disabled, preventing unintended voltage fluctuations that could degrade display performance or increase power consumption. The invention includes a first driver circuit that generates an emission start pulse and a second driver circuit that interacts with the output terminal of this pulse. When the second driver circuit is disabled, it is configured to actively pull the output terminal of the emission start pulse to a high level. This ensures that the signal remains stable and does not float or drop to an undefined state, which could otherwise cause timing errors or excessive power draw. The second driver circuit's ability to maintain a high level when inactive improves reliability and efficiency in display systems, particularly in applications requiring precise timing control, such as high-resolution or high-refresh-rate displays. The solution is applicable in various display technologies, including OLED and LCD panels, where emission timing accuracy is critical.
9. The method of claim 8, wherein the first driver circuit is configured to output the second emission start pulse to control the second area of the display panel when the second driver circuit is disabled, and the second driver circuit is configured to output a third emission start pulse to control the second area of the display panel when the second driver circuit is enabled.
This invention relates to display panel control systems, specifically addressing the challenge of managing emission start pulses in a display panel with multiple driver circuits. The system includes a display panel divided into at least two areas, a first driver circuit, and a second driver circuit. The first driver circuit is configured to output a second emission start pulse to control the second area of the display panel when the second driver circuit is disabled. When the second driver circuit is enabled, it outputs a third emission start pulse to control the second area of the display panel. This dual-control mechanism ensures proper emission timing and synchronization across the display panel, even when one of the driver circuits is inactive. The system may also include a timing controller that generates a first emission start pulse to control the first area of the display panel, ensuring coordinated operation between the driver circuits. The invention improves display performance by maintaining consistent emission timing and reducing potential disruptions caused by driver circuit failures or deactivation.
10. The method of claim 8, wherein the display panel comprises a switch coupled to an output terminal of the first driver circuit outputting the second emission start pulse.
A method for controlling a display panel involves generating and transmitting emission start pulses to control light emission in display elements. The display panel includes a switch connected to an output terminal of a first driver circuit, which outputs a second emission start pulse. This switch regulates the transmission of the second emission start pulse to specific display elements, ensuring precise timing and synchronization of light emission. The method addresses the challenge of maintaining accurate emission control in high-resolution displays, where timing discrepancies can lead to visual artifacts. By integrating the switch with the driver circuit, the method improves signal integrity and reduces power consumption by selectively activating only the necessary display elements. The first driver circuit generates the second emission start pulse based on a first emission start pulse received from a timing controller, ensuring coordinated operation across the display panel. The switch's placement at the output terminal allows for fine-tuned control over the pulse distribution, enhancing display performance and energy efficiency. This approach is particularly useful in advanced display technologies requiring precise emission timing, such as OLED or microLED displays.
12. The method of claim 1, wherein the first driver circuit and the second driver circuit are configured to output a supply voltage to the display panel, and a first voltage source terminal corresponding to the supply voltage of the first driver circuit is coupled to a second voltage source terminal corresponding to the supply voltage of the second driver circuit.
Display driver circuits and methods for controlling display panels. A problem addressed is the management and interconnection of multiple driver circuits providing a common supply voltage to a display panel. This invention describes a system involving at least two distinct driver circuits, specifically a first driver circuit and a second driver circuit. Both of these circuits are designed to generate and output a supply voltage. This supply voltage is intended for application to a display panel. A key feature is the interconnection of the voltage output stages of these driver circuits. Specifically, a voltage source terminal associated with the supply voltage output of the first driver circuit is electrically connected to a voltage source terminal associated with the supply voltage output of the second driver circuit. This coupling ensures a common supply voltage is provided to the display panel by both driver circuits.
13. The method of claim 1, wherein the first driver circuit is enabled when the second driver circuit is disabled.
A system and method for controlling driver circuits in an electronic device addresses the problem of managing power consumption and signal integrity in circuits where multiple driver circuits are used to drive a common load. The invention involves a first driver circuit and a second driver circuit, each capable of driving a load such as a transmission line or an output port. The first driver circuit is enabled when the second driver circuit is disabled, ensuring that only one driver circuit is active at any given time. This prevents signal conflicts, reduces power consumption, and improves reliability by avoiding simultaneous activation of multiple drivers. The method includes detecting a condition that triggers the switching between the first and second driver circuits, such as a change in input signal or a power-saving mode activation. The switching mechanism ensures seamless transition without signal disruption. The invention is particularly useful in high-speed communication systems, power management circuits, and other applications where efficient driver control is critical. By coordinating the activation and deactivation of the driver circuits, the system optimizes performance while minimizing power usage and signal interference.
14. The method of claim 1, wherein the display panel is an organic light-emitting diode (OLED) panel, and the at least one emission control signal is configured to control emission of OLEDs on the OLED panel.
This invention relates to display technology, specifically methods for controlling emission in organic light-emitting diode (OLED) panels. OLED displays are widely used in electronic devices due to their high contrast, flexibility, and energy efficiency. However, managing power consumption and image quality remains a challenge, particularly in dynamic content where brightness and emission timing must be precisely controlled. The invention describes a method for controlling emission in an OLED panel by generating at least one emission control signal. This signal regulates the light emission of individual OLEDs on the panel, ensuring accurate brightness levels and reducing power consumption. The method involves generating a data signal representing image data and a control signal that determines the timing and duration of OLED emission. The emission control signal is synchronized with the data signal to ensure proper display of the image while optimizing power usage. The method also includes a step where the emission control signal is adjusted based on external factors, such as ambient lighting conditions or user preferences, to enhance display performance. By dynamically controlling OLED emission, the invention improves energy efficiency and image quality in OLED displays, making it suitable for applications in smartphones, televisions, and wearable devices. The technique ensures precise light output while minimizing unnecessary power draw, addressing key limitations in OLED display technology.
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November 22, 2021
April 9, 2024
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