Patentable/Patents/US-11961737
US-11961737

Semiconductor structure and manufacturing method

PublishedApril 16, 2024
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A semiconductor structure includes a substrate including a base and a plurality of fins discretely formed over the base. Each fin is made of a material including a first atom and contains openings therein. The semiconductor structure also includes a source-drain doped layer located in each opening and including a seed layer on a surface of an inner wall of the opening and a body layer on a surface of the seed layer. A material of the seed layer includes the first atom, a second atom, and a third atom. A material of the body layer includes the first atom and the second atom.

Patent Claims
9 claims

Legal claims defining the scope of protection, as filed with the USPTO.

2

2. The semiconductor structure of claim 1, wherein the first atom includes a silicon atom, and the second atom includes a phosphorus atom.

3

3. The semiconductor structure of claim 1, wherein a concentration percentage of the third atom in the seed layer is less than a concentration percentage of the first atom in the seed layer, and is less than a concentration percentage of the second atom in the seed layer.

4

4. The semiconductor structure of claim 3, wherein a concentration percentage of the second atom in the body layer is greater than the concentration percentage of the second atom in the seed layer.

5

5. The semiconductor structure of claim 1, wherein a thickness of the seed layer ranges from 2 nanometers to 8 nanometers from the surface of the inner wall of the opening.

6

6. The semiconductor structure of claim 1, wherein a maximum width of the source-drain doped layer is 45 nanometers in a direction perpendicular to an extending direction of the plurality of fins.

7

7. The semiconductor structure of claim 1, wherein a maximum height of the source-drain doped layer is 60 nanometers, the maximum height of the source-drain doped layer being a vertical distance from a bottom of the source-drain doped layer to a top of source-drain doped layer.

10

10. The manufacturing method of claim 9, wherein the first atom includes a silicon atom, and the second atom includes a phosphorus atom.

15

15. The manufacturing method of claim 9, wherein a concentration percentage of the third atom in the seed layer is less than a concentration percentage of the first atom in the seed layer, and is less than a concentration percentage of the second atom in the seed layer.

16

16. The manufacturing method of claim 15, wherein a concentration percentage of the second atom in the body layer is greater than the concentration percentage of the second atom in the seed layer.

Classification Codes (CPC)

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Patent Metadata

Filing Date

September 16, 2021

Publication Date

April 16, 2024

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Cite as: Patentable. “Semiconductor structure and manufacturing method” (US-11961737). https://patentable.app/patents/US-11961737

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