A phase-change memory (PCM) cell is provided to include a first electrode, a second electrode, and a phase-change feature disposed between the first electrode and the second electrode. The phase-change feature is configured to change its data state based on a write operation performed on the PCM cell. The write operation includes a reset stage and a set stage. In the reset stage, a plurality of reset current pulses are applied to the PCM cell, and the reset current pulses have increasing current amplitudes. In the set stage, a plurality of set current pulses are applied to the PCM cell, and the set current pulses exhibit an increasing trend in current amplitude. The current amplitudes of the set current pulses are smaller than those of the reset current pulses.
Legal claims defining the scope of protection, as filed with the USPTO.
2. The PCM cell according to claim 1, wherein the reset current pulses have a fixed pulse width.
3. The PCM cell according to claim 2, wherein the pulse width of the reset current pulses ranges from 5 ns to 100 ns.
6. The PCM cell according to claim 5, wherein the pulse widths of the set current pulses range from 50 ns to 500 ns.
7. The PCM cell according to claim 5, wherein, for at least one of the sub-stages, the some of the set current pulses in the sub-stage have a same current amplitude.
8. The PCM cell according to claim 5, wherein, for at least one of the sub-stages, the some of the set current pulses in the sub-stage have multiple current amplitudes.
11. The PCM cell according to claim 10, wherein more than 60% of the crystalline microstructure in the low-resistivity portion of the active region has a hexagonal crystal structure.
12. The PCM cell according to claim 5, wherein, in the set stage, a relationship between an electrical resistance of the phase-change feature and current amplitudes of the set current pulses form a curve that has a slope section with a slope of n, where 2≤n≤5, and n is obtained by using an equation of RSET=C0×ISET−n+C1 to approximate the slope section, where ISET represents the current amplitudes of the set current pulses in μA, RSET represents the electrical resistance of the phase-change feature in kΩ, which results from the set current pulses, and C0 and C1 are constants.
14. The PCM cell according to claim 13, wherein a ratio of a width of the active region to a width of the first electrode is in a range from 0.5 to 2.0, and a ratio of a height of the active region to a height of the phase-change feature is a range from 0.2 to 0.8.
15. The PCM cell according to claim 13, wherein a ratio of a width of the high-resistivity portion to a width of the first electrode is in a range from 0.1 to 2.0, and a ratio of a height of the high-resistivity portion to a height of the phase-change feature is in a range from 0.05 to 0.8.
16. The PCM cell according to claim 13, wherein the phase-change feature is a GST feature that includes germanium, antimony and tellurium, and more than 60% of the crystalline microstructure in the active region has a hexagonal crystal structure when the active region is in the low-resistivity state.
17. The PCM cell according to claim 16, wherein more than 60% of the crystalline microstructure in the low-resistivity portion of the active region has a hexagonal crystal structure.
20. The PCM cell according to claim 18, wherein more than 60% of the crystalline microstructure in the low-resistivity portion of the active region has a hexagonal crystal structure.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
January 21, 2022
May 7, 2024
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