A phase-change memory (PCM) cell is provided to include a first electrode, a second electrode, and a phase-change feature disposed between the first electrode and the second electrode. The phase-change feature is configured to change its data state based on a write operation performed on the PCM cell. The write operation includes a reset stage and a set stage. In the reset stage, a plurality of reset current pulses are applied to the PCM cell, and the reset current pulses have increasing current amplitudes. In the set stage, a plurality of set current pulses are applied to the PCM cell, and the set current pulses exhibit an increasing trend in current amplitude. The current amplitudes of the set current pulses are smaller than those of the reset current pulses.
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2. The PCM cell according to claim 1, wherein the reset current pulses have a fixed pulse width.
Phase-change memory (PCM) cells use programmable resistance states to store data, transitioning between amorphous (high-resistance) and crystalline (low-resistance) phases via electrical pulses. A challenge in PCM technology is achieving reliable and consistent reset operations, where the cell is reset to the amorphous state. Variations in reset current pulses can lead to inconsistent resistance states, affecting data integrity and endurance. This invention addresses the problem by implementing reset current pulses with a fixed pulse width. The fixed pulse width ensures uniform energy delivery during the reset operation, minimizing variability in the amorphous state formation. This improves the reliability and consistency of the reset process, enhancing the overall performance and longevity of the PCM cell. The fixed pulse width can be applied in conjunction with other reset current parameters, such as amplitude or duration, to optimize the reset operation further. By standardizing the pulse width, the invention mitigates issues related to thermal fluctuations and material inconsistencies, leading to more predictable and stable PCM cell behavior. This approach is particularly beneficial in high-density memory applications where precise control over resistance states is critical.
3. The PCM cell according to claim 2, wherein the pulse width of the reset current pulses ranges from 5 ns to 100 ns.
Phase-change memory (PCM) cells utilize materials that switch between amorphous and crystalline states to store data. A key challenge is achieving reliable and efficient switching between these states using electrical pulses. The invention addresses this by controlling the pulse width of reset current pulses, which are used to transition the PCM cell from a crystalline to an amorphous state. The reset current pulses have a pulse width ranging from 5 nanoseconds to 100 nanoseconds. This range ensures effective amorphization of the phase-change material while minimizing power consumption and thermal stress. The pulse width is carefully selected to balance speed and energy efficiency, avoiding overly short pulses that may fail to fully reset the cell and overly long pulses that waste energy. The invention may be part of a broader PCM cell design that includes a phase-change material layer, electrodes, and a heater element to facilitate the phase transition. The controlled pulse width improves the reliability and performance of PCM cells in memory applications.
6. The PCM cell according to claim 5, wherein the pulse widths of the set current pulses range from 50 ns to 500 ns.
Phase-change memory (PCM) cells utilize programmable resistance changes in a chalcogenide material to store data. A key challenge in PCM technology is achieving reliable and efficient programming of the memory cells, particularly in balancing speed, energy consumption, and endurance. Conventional approaches often struggle with optimizing pulse parameters to ensure stable phase transitions without excessive power or degradation. This invention addresses these issues by specifying a PCM cell that employs set current pulses with precisely controlled pulse widths. The pulse widths for these set current pulses are defined to range between 50 nanoseconds and 500 nanoseconds. This range is selected to optimize the programming process, ensuring that the chalcogenide material transitions between amorphous and crystalline states efficiently. Shorter pulses (closer to 50 ns) may be used for faster programming, while longer pulses (up to 500 ns) can improve stability and reduce energy consumption. The controlled pulse widths help minimize thermal stress on the material, enhancing the cell's endurance and reliability. This approach is particularly useful in high-density memory applications where both performance and longevity are critical. The invention may be integrated into a broader PCM cell design that includes additional features, such as specific electrode configurations or thermal management structures, to further improve performance.
7. The PCM cell according to claim 5, wherein, for at least one of the sub-stages, the some of the set current pulses in the sub-stage have a same current amplitude.
Phase-change memory (PCM) cells use programmable resistance states to store data by applying electrical pulses to change the material's phase between amorphous and crystalline states. A challenge in PCM technology is achieving precise and reliable resistance levels during programming, as variations in pulse parameters can lead to inconsistent state transitions. This invention addresses the issue by introducing a multi-stage programming method for PCM cells, where each stage consists of multiple sub-stages. In at least one of these sub-stages, some of the current pulses applied have the same amplitude. This ensures controlled and uniform resistance changes within that sub-stage, improving programming accuracy and reducing variability. The method allows for fine-tuning the resistance state by adjusting pulse parameters across different sub-stages, while maintaining stability within each sub-stage through the use of identical current amplitudes. This approach enhances the reliability and performance of PCM cells by minimizing programming errors and ensuring consistent state transitions.
8. The PCM cell according to claim 5, wherein, for at least one of the sub-stages, the some of the set current pulses in the sub-stage have multiple current amplitudes.
Phase-change memory (PCM) cells are used for non-volatile data storage by exploiting the resistance change between amorphous and crystalline states of a phase-change material. A challenge in PCM operation is achieving precise resistance levels during programming, which is critical for multi-level cell (MLC) applications where multiple resistance states represent different data bits. Conventional programming methods often struggle with accuracy due to variability in pulse application, leading to unreliable data storage. This invention addresses the problem by improving the programming process of a PCM cell. The cell includes a phase-change material and a heater element to induce state changes. The programming process is divided into multiple sub-stages, where each sub-stage applies a set of current pulses to the cell. A key innovation is that within at least one of these sub-stages, some of the current pulses have multiple current amplitudes. This allows for finer control over the resistance state of the cell, improving programming accuracy and reliability. By varying the amplitude of pulses within a sub-stage, the cell can achieve more precise resistance adjustments, which is particularly beneficial for MLC applications where multiple distinct resistance levels are required. The method ensures that the phase-change material transitions smoothly between states, reducing errors and enhancing data retention.
11. The PCM cell according to claim 10, wherein more than 60% of the crystalline microstructure in the low-resistivity portion of the active region has a hexagonal crystal structure.
Phase-change memory (PCM) cells are used for non-volatile data storage, relying on reversible phase transitions between amorphous and crystalline states to represent binary data. A key challenge is achieving stable, low-resistivity crystalline states with high thermal and electrical endurance. This invention addresses this by optimizing the crystalline microstructure in the active region of a PCM cell to enhance performance. The PCM cell includes an active region with a low-resistivity portion, where more than 60% of the crystalline microstructure adopts a hexagonal crystal structure. Hexagonal crystals are preferred because they provide superior thermal stability and lower resistivity compared to other crystal structures, such as face-centered cubic (FCC) or body-centered cubic (BCC). This structural optimization improves the cell's switching speed, reduces power consumption, and extends its operational lifespan. The hexagonal crystal structure is achieved through controlled heating and cooling processes during the crystallization phase, ensuring uniform and stable crystal formation. The resulting PCM cell exhibits reliable data retention and faster read/write operations, making it suitable for high-performance memory applications.
12. The PCM cell according to claim 5, wherein, in the set stage, a relationship between an electrical resistance of the phase-change feature and current amplitudes of the set current pulses form a curve that has a slope section with a slope of n, where 2≤n≤5, and n is obtained by using an equation of RSET=C0×ISET−n+C1 to approximate the slope section, where ISET represents the current amplitudes of the set current pulses in μA, RSET represents the electrical resistance of the phase-change feature in kΩ, which results from the set current pulses, and C0 and C1 are constants.
This invention relates to phase-change memory (PCM) cells, specifically addressing the relationship between the electrical resistance of the phase-change material and the current amplitudes of set current pulses used to program the cell. The problem being solved involves optimizing the set operation in PCM cells to achieve precise and reliable resistance states, which is critical for data storage accuracy and endurance. The invention describes a PCM cell where, during the set stage, the relationship between the electrical resistance of the phase-change feature and the current amplitudes of the set current pulses follows a specific mathematical model. This relationship is characterized by a curve with a slope section where the slope (n) ranges between 2 and 5. The slope is derived using the equation RSET = C0 × ISET⁻ⁿ + C1, where ISET represents the current amplitude of the set pulses in microamperes (μA), RSET is the resulting resistance of the phase-change feature in kilohms (kΩ), and C0 and C1 are constants. This model ensures that the resistance of the phase-change material can be accurately controlled by adjusting the current amplitude of the set pulses, improving the reliability and performance of the PCM cell. The invention enhances the precision of resistance programming, which is essential for high-density and high-reliability memory applications.
14. The PCM cell according to claim 13, wherein a ratio of a width of the active region to a width of the first electrode is in a range from 0.5 to 2.0, and a ratio of a height of the active region to a height of the phase-change feature is a range from 0.2 to 0.8.
Phase-change memory (PCM) cells use a phase-change material that switches between amorphous and crystalline states to store data. A key challenge is optimizing the geometry of the active region and electrodes to improve performance, reliability, and energy efficiency. This invention addresses this by defining specific dimensional relationships between the active region, electrodes, and phase-change feature in a PCM cell. The active region, where phase transitions occur, has a width ratio to the first electrode between 0.5 and 2.0, ensuring efficient heat distribution and electrical contact. The height ratio of the active region to the phase-change feature ranges from 0.2 to 0.8, balancing thermal confinement and switching speed. These ratios optimize the cell's thermal and electrical properties, enhancing data retention, reducing power consumption, and improving switching speed. The design ensures uniform phase transitions and minimizes thermal crosstalk with neighboring cells, making it suitable for high-density memory applications. The invention builds on a PCM cell structure where the active region is confined within a dielectric material, and the phase-change feature is embedded between electrodes to facilitate controlled phase transitions.
15. The PCM cell according to claim 13, wherein a ratio of a width of the high-resistivity portion to a width of the first electrode is in a range from 0.1 to 2.0, and a ratio of a height of the high-resistivity portion to a height of the phase-change feature is in a range from 0.05 to 0.8.
Phase-change memory (PCM) cells use a phase-change material that switches between amorphous and crystalline states to store data. A key challenge is optimizing the thermal and electrical properties of the cell to ensure reliable and efficient switching while minimizing power consumption and heat dissipation. This invention addresses these issues by controlling the geometric dimensions of a high-resistivity portion within the PCM cell. The PCM cell includes a phase-change feature sandwiched between a first electrode and a second electrode. The high-resistivity portion is positioned adjacent to the phase-change feature and is designed to regulate heat flow and current distribution during operation. The width of the high-resistivity portion relative to the first electrode is controlled to be between 0.1 and 2.0 times the width of the first electrode. Similarly, the height of the high-resistivity portion relative to the phase-change feature is set to be between 0.05 and 0.8 times the height of the phase-change feature. These dimensional constraints ensure optimal thermal confinement and electrical performance, improving switching speed, energy efficiency, and reliability. The high-resistivity portion may be made of a material with higher resistivity than the phase-change material, such as a dielectric or a semiconductor, to further enhance performance. This design allows for precise control over the thermal and electrical behavior of the PCM cell, making it suitable for high-density memory applications.
16. The PCM cell according to claim 13, wherein the phase-change feature is a GST feature that includes germanium, antimony and tellurium, and more than 60% of the crystalline microstructure in the active region has a hexagonal crystal structure when the active region is in the low-resistivity state.
A phase-change memory (PCM) cell includes a phase-change feature composed of a germanium-antimony-tellurium (GST) alloy. The active region of the cell, which undergoes phase transitions between amorphous and crystalline states, exhibits a low-resistivity state when in a crystalline phase. In this state, more than 60% of the crystalline microstructure within the active region adopts a hexagonal crystal structure. This structural characteristic enhances the stability and performance of the PCM cell by improving the uniformity and reliability of the low-resistivity state. The hexagonal crystal structure is achieved through controlled thermal processing during the crystallization phase, ensuring consistent electrical properties. The PCM cell leverages this microstructure to achieve faster switching speeds, lower power consumption, and improved endurance compared to conventional PCM cells with less ordered crystalline phases. The use of a GST alloy further ensures compatibility with existing semiconductor manufacturing processes, making the cell suitable for high-density memory applications. The hexagonal crystal structure in the active region minimizes resistance drift over time, enhancing data retention and reliability in memory storage devices.
17. The PCM cell according to claim 16, wherein more than 60% of the crystalline microstructure in the low-resistivity portion of the active region has a hexagonal crystal structure.
Phase-change memory (PCM) cells utilize a chalcogenide material that transitions between amorphous and crystalline states to store data. A key challenge is achieving stable, low-resistivity crystalline states for reliable data retention and fast switching. This invention addresses this by optimizing the crystalline microstructure in the active region of the PCM cell. Specifically, the low-resistivity portion of the active region is engineered to have more than 60% of its crystalline microstructure in a hexagonal crystal structure. This hexagonal phase improves thermal stability and electrical conductivity, enhancing the cell's performance. The active region is the part of the PCM cell where phase transitions occur, and the low-resistivity portion is the crystalline state that represents stored data. By controlling the crystal structure, the invention ensures faster switching speeds, better endurance, and longer data retention. The hexagonal crystal structure is achieved through precise thermal processing and material composition adjustments, ensuring the majority of the crystalline phase meets the specified percentage. This innovation is particularly useful in high-density memory applications where reliability and speed are critical.
20. The PCM cell according to claim 18, wherein more than 60% of the crystalline microstructure in the low-resistivity portion of the active region has a hexagonal crystal structure.
Phase-change memory (PCM) cells are used for non-volatile data storage, relying on the reversible phase transition between amorphous and crystalline states of a chalcogenide material to represent binary data. A key challenge in PCM technology is achieving stable, low-resistivity crystalline states that enable fast read/write operations and long endurance. This invention describes a PCM cell with an improved crystalline microstructure in the low-resistivity portion of the active region. Specifically, more than 60% of the crystalline microstructure in this portion exhibits a hexagonal crystal structure. Hexagonal crystal phases are known to provide better thermal stability and lower resistivity compared to other crystal structures, which enhances the performance and reliability of the PCM cell. The hexagonal crystal structure reduces the risk of phase separation and degradation over repeated cycles, improving the cell's endurance and data retention. Additionally, the low-resistivity hexagonal phase allows for faster switching between amorphous and crystalline states, enabling higher-speed read and write operations. The invention focuses on optimizing the material composition and processing conditions to achieve this high proportion of hexagonal crystals in the active region, ensuring consistent performance across multiple memory cells.
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January 21, 2022
May 7, 2024
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