A display apparatus includes a display area including pixels on a substrate, a pad portion on the substrate in a non-display area outside the display area, and including a conductive line, a first dummy line around the conductive line, and a first anti-fuse and a second anti-fuse adjacent to the conductive line and spaced apart from each other in a lengthwise direction of the conductive line, the first anti-fuse and the second anti-fuse each including a first electrode electrically connected to a portion of the conductive line, and a second electrode over the first electrode with a first insulating layer therebetween, and electrically connected to a portion of the first dummy line, and a circuit portion overlapping, and electrically connected to, the pad portion.
Legal claims defining the scope of protection, as filed with the USPTO.
2. The display apparatus of claim 1, wherein the first electrode of the first anti-fuse and the first electrode of the second anti-fuse are integral with a portion of the conductive line.
4. The display apparatus of claim 1, wherein the first anti-fuse and the second anti-fuse each further comprise a third electrode spaced apart from the first electrode with the first insulating layer therebetween.
5. The display apparatus of claim 4, wherein the pad portion further comprises a second dummy line electrically connected to the third electrode of the first anti-fuse and to the third electrode of the second anti-fuse.
6. The display apparatus of claim 5, wherein the second dummy line is integral with the third electrode of the first anti-fuse and with the third electrode of the second anti-fuse.
8. The display apparatus of claim 1, wherein at least one of the first anti-fuse and the second anti-fuse further comprises a metal oxide layer on the first electrode thereof.
9. The display apparatus of claim 1, wherein at least one of the first anti-fuse and the second anti-fuse further comprises a semiconductor layer connected to the second electrode thereof, and located between the first electrode and the second electrode thereof.
10. The display apparatus of claim 9, wherein at least one of the first anti-fuse and the second anti-fuse further comprises an upper electrode on the semiconductor layer.
11. The display apparatus of claim 10, wherein an area of the upper electrode is greater than an area of the first electrode.
15. The display apparatus of claim 14, further comprising an upper insulating layer covering an edge of the first dummy line, and defining an opening overlapping the first dummy line.
16. The display apparatus of claim 14, wherein the first anti-fuse further comprises a third electrode spaced apart from the first electrode with the first insulating layer therebetween.
17. The display apparatus of claim 16, wherein the pad portion further comprises a second dummy line electrically connected to the third electrode of the first anti-fuse.
18. The display apparatus of claim 17, wherein the circuit portion further comprises a second counter conductive line overlapping the second dummy line.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
September 29, 2021
May 7, 2024
Browse 5M+ US patents with plain-English claim translations and AI-generated analysis.