A trench silicon carbide metal-oxide semiconductor field effect transistor includes a silicon carbide semiconductor substrate and a trench metal-oxide semiconductor field effect transistor, the field effect transistor includes a trench vertically arranged and penetrating along a first horizontal direction, a gate insulating layer formed on an inner wall of the trench, a first poly gate formed on the gate insulating layer, a shield region formed outsides and below the trench, and a field plate arranged between a bottom wall of the trench and the shield region, and the field plate has semiconductor doping and is laterally in contact to a current spreading layer to deplete electrons of the current spreading layer when a reverse bias voltage is applied.
Legal claims defining the scope of protection, as filed with the USPTO.
2. The silicon carbide semiconductor device according to claim 1, wherein the gate region has a first maximum width, the field plate has a second maximum width, the shield region has a third maximum width, and the second maximum width is smaller than the first maximum width and is smaller than the third maximum width.
3. The silicon carbide semiconductor device according to claim 1, wherein the gate region has a first maximum width, the field plate has a second maximum width, the shield region has a third maximum width, and the second maximum width is larger than the first maximum width and is smaller than the third maximum width.
4. The silicon carbide semiconductor device according to claim 1, wherein a thickness of the field plate corresponds to that of the current spreading layer.
5. The silicon carbide semiconductor device according to claim 1, wherein the trench vertically penetrates through the first semiconductor region and the third silicon carbide semiconductor layer to enable a bottom wall of the trench to be close to a bottom of the third silicon carbide semiconductor layer.
6. The silicon carbide semiconductor device according to claim 1, wherein the trench vertically penetrates through the first semiconductor region and the third silicon carbide semiconductor layer to enable a bottom wall of the trench to be close to a bottom of the current spreading layer.
7. The silicon carbide semiconductor device according to claim 1, wherein the shield region extends below the trench along the first horizontal direction to form a shield section of a continuous structure.
8. The silicon carbide semiconductor device according to claim 1, wherein the shield region comprises a plurality of shield blocks which are segmentally arranged below the trench along the first horizontal direction.
9. The silicon carbide semiconductor device according to claim 8, wherein a pitch provided between the shield blocks along the first horizontal direction is in a range between 0.5 μm and 3.0 μm.
10. The silicon carbide semiconductor device according to claim 1, wherein a lateral junction is formed between the field plate and the current spreading layer and has a height between 0.5 μm and 1.5 μm.
11. The silicon carbide semiconductor device according to claim 1, wherein the gate region and the field plate are separated from each other, and the field plate is in contact to the shield region.
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January 11, 2021
May 14, 2024
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