A semiconductor device includes a substrate, conductive features on the substrate, and a passivation layer over the conductive features to define conductive pads in the respective conductive features through exposed portions of each of the conductive features. Each corner of the conductive pads is free of right angle, the substrate has a pair of long sides from a top view perspective, the shape of each of the conductive pads is a parallelogram. Each of the conductive pads has a pair of long sides and a pair of short sides from a top view perspective, a portion of the conductive pads have the long sides sloped away from a first pad density area of the substrate and toward one long side of the substrate, and the rest of the conductive pads have the long sides sloped toward the first pad density area and toward the other long side of the substrate.
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2. The semiconductor device of claim 1, wherein the passivation layer provides trenches to expose portions of the plurality of conductive features.
A semiconductor device includes a substrate with a plurality of conductive features, such as metal lines or vias, embedded in an insulating layer. A passivation layer is formed over the insulating layer and the conductive features. The passivation layer includes trenches that expose portions of the conductive features, allowing for electrical connections or further processing. The trenches may be formed by etching the passivation layer to selectively remove material above the conductive features while leaving other regions intact. This design enables direct access to the conductive features for bonding, probing, or additional metallization steps without damaging the underlying structure. The passivation layer may be composed of materials such as silicon nitride, silicon oxide, or polymer-based dielectrics, chosen for their insulating properties and compatibility with semiconductor fabrication processes. The exposed portions of the conductive features facilitate electrical testing, interconnection with other components, or integration into larger circuits. The trenches can be precisely patterned using photolithography and etching techniques to ensure accurate alignment with the conductive features. This configuration is particularly useful in advanced semiconductor packaging, where reliable electrical connections are critical for device performance and yield.
3. The semiconductor device of claim 1, wherein the short sides of each of the plurality of conductive pads are parallel to the long sides of the substrate.
A semiconductor device includes a substrate with long sides and a plurality of conductive pads arranged on the substrate. Each conductive pad has short sides that are parallel to the long sides of the substrate. The conductive pads are positioned such that their long sides are perpendicular to the long sides of the substrate. The device may also include a semiconductor chip mounted on the substrate, with the conductive pads electrically connected to the chip. The arrangement of the conductive pads ensures efficient electrical connections while optimizing space utilization on the substrate. The substrate may further include conductive traces that connect the conductive pads to the semiconductor chip, facilitating signal transmission. The parallel alignment of the conductive pads' short sides with the substrate's long sides enhances structural stability and reduces signal interference. This configuration is particularly useful in high-density semiconductor packaging where precise alignment and efficient space utilization are critical. The device may also include additional components such as insulating layers, solder bumps, or underfill materials to improve reliability and performance. The overall design ensures robust electrical connections while maintaining compact dimensions.
4. The semiconductor device of claim 1, wherein the first area is located at the center of the substrate.
A semiconductor device includes a substrate with a first area and a second area, where the first area is positioned at the center of the substrate. The first area contains a first semiconductor layer, while the second area contains a second semiconductor layer. The first semiconductor layer has a first conductivity type, and the second semiconductor layer has a second conductivity type, which is opposite to the first conductivity type. The device also includes a first electrode electrically connected to the first semiconductor layer and a second electrode electrically connected to the second semiconductor layer. The first and second electrodes are configured to apply a voltage between the first and second semiconductor layers. The first area, being centrally located, may enhance electrical or thermal properties, such as reducing resistance or improving heat dissipation. The device may be used in power electronics, sensors, or integrated circuits where precise control of electrical characteristics is required. The central placement of the first area can optimize performance by minimizing parasitic effects or improving symmetry in electrical fields.
5. The semiconductor device of claim 1, wherein the substrate further includes at least two second area, and the first area is located between the second areas.
A semiconductor device includes a substrate with a first area and at least two second areas, where the first area is positioned between the second areas. The substrate is designed to support electronic components or circuits, with the first area serving as a central region flanked by the second areas. The second areas may function as active regions for transistors, sensors, or other semiconductor elements, while the first area could act as an isolation region, interconnect layer, or a region for additional circuitry. The arrangement ensures proper spacing and electrical isolation between the second areas, improving device performance and reliability. The substrate may be made of silicon, gallium arsenide, or other semiconductor materials, and the device could be part of an integrated circuit, microelectromechanical system (MEMS), or other semiconductor-based technology. The configuration optimizes layout efficiency, thermal management, and electrical connectivity, addressing challenges in miniaturization and high-density integration.
6. The semiconductor device of claim 1, wherein each corner of each of the plurality of conductive pads is free of right angle.
The semiconductor device includes a plurality of conductive pads arranged on a substrate, where each conductive pad has a rounded corner design. The rounded corners eliminate sharp right angles, reducing stress concentrations and improving reliability. The conductive pads are electrically connected to underlying conductive features through vias or other interconnect structures. The substrate may include semiconductor materials, such as silicon, and the conductive pads may be formed from metals like copper or aluminum. The rounded corners prevent cracking or delamination at the pad edges, which can occur due to thermal or mechanical stress during manufacturing or operation. This design is particularly useful in high-density interconnect applications where stress management is critical. The rounded corners can be achieved through etching processes, photolithography, or other semiconductor fabrication techniques. The device may also include insulating layers to isolate the conductive pads from adjacent features. The rounded corner design ensures better adhesion between the conductive pads and the substrate, enhancing overall device performance and longevity.
7. The semiconductor device of claim 4, wherein the passivation layer includes silicon nitride (SiN), silicon carbide (SiC), silicon oxide (SiO), and/or silicon oxynitride (SiON).
The semiconductor device includes a passivation layer designed to protect underlying semiconductor structures from environmental damage, such as moisture, contaminants, and mechanical stress. The passivation layer is composed of one or more materials selected from silicon nitride (SiN), silicon carbide (SiC), silicon oxide (SiO), and silicon oxynitride (SiON). These materials are chosen for their excellent insulating properties, chemical stability, and ability to form a dense, conformal barrier. Silicon nitride (SiN) provides high mechanical strength and moisture resistance, while silicon carbide (SiC) offers superior thermal conductivity and hardness. Silicon oxide (SiO) is known for its low dielectric constant and compatibility with semiconductor fabrication processes, and silicon oxynitride (SiON) combines the benefits of both silicon oxide and silicon nitride, offering a balance of electrical insulation and mechanical durability. The passivation layer is applied over the semiconductor structures to enhance device reliability and longevity by preventing degradation from external factors. This configuration ensures robust protection while maintaining electrical performance and structural integrity.
8. The semiconductor device of claim 1, wherein the semiconductive material includes silicon, silicon-germanium, or other semiconductor materials including III-V or II-VI materials.
The semiconductor device relates to advanced semiconductor materials used in electronic and optoelectronic applications. Traditional semiconductor devices often rely on silicon, but there is a need for improved performance, efficiency, and functionality in modern applications such as high-speed transistors, photodetectors, and light-emitting devices. This device addresses these challenges by incorporating alternative semiconductive materials, including silicon, silicon-germanium, and other compound semiconductors such as III-V (e.g., gallium arsenide, indium phosphide) or II-VI (e.g., cadmium telluride, zinc selenide) materials. These materials offer superior electron mobility, bandgap tunability, and optical properties compared to conventional silicon, enabling enhanced device performance in high-frequency, high-power, and optoelectronic applications. The use of these materials allows for the fabrication of devices with improved switching speeds, lower power consumption, and broader spectral response, making them suitable for applications in telecommunications, imaging, and energy conversion. The device structure may include layers or regions composed of these materials, either in pure form or as alloys, to achieve desired electrical and optical characteristics. This flexibility in material selection enables customization for specific performance requirements, such as high carrier mobility for transistors or direct bandgap properties for light-emitting diodes. The integration of these materials into semiconductor devices provides a solution for overcoming the limitations of traditional silicon-based technologies in high-performance and specialized applications.
10. The flexible display of claim 9, wherein the flexible substrate includes polyimide.
A flexible display system addresses the challenge of creating durable, lightweight, and bendable display devices for applications such as wearable electronics, foldable smartphones, and curved screens. Traditional rigid displays, often made from glass or rigid plastics, lack the flexibility needed for modern portable and conformable devices. The invention improves upon prior art by incorporating a flexible substrate, specifically one that includes polyimide, to enhance durability, flexibility, and resistance to environmental factors like moisture and temperature variations. Polyimide is chosen for its high thermal stability, chemical resistance, and mechanical strength, making it ideal for flexible substrates that must withstand repeated bending and folding without degradation. The flexible substrate supports an array of display elements, such as organic light-emitting diodes (OLEDs) or liquid crystal displays (LCDs), enabling the display to conform to various shapes while maintaining optical performance. The use of polyimide in the substrate ensures long-term reliability, reducing the risk of cracks or delamination that can occur with less robust materials. This innovation allows for the production of displays that can be rolled, folded, or bent without compromising functionality, expanding the possibilities for next-generation electronic devices.
11. The flexible display of claim 9, wherein the semiconductor device is attached to a non-display area of the flexible substrate.
A flexible display system includes a flexible substrate with a display area and a non-display area. The display area contains an array of display elements, such as organic light-emitting diodes (OLEDs), configured to emit light to produce images. The non-display area surrounds the display area and may include electrical connections, control circuitry, or other components necessary for operating the display. A semiconductor device, such as a driver integrated circuit (IC) or a sensor, is attached to the non-display area of the flexible substrate. This semiconductor device provides functionality such as driving the display elements, processing signals, or sensing environmental conditions. The flexible substrate allows the display to bend or fold without damaging the attached semiconductor device, enabling compact and versatile form factors for electronic devices. The attachment of the semiconductor device to the non-display area ensures that it does not interfere with the display area, maintaining image quality and reliability. This design is particularly useful in applications requiring flexible or foldable displays, such as smartphones, tablets, or wearable devices.
12. The flexible display of claim 9, wherein plurality of conductive features are bonded a conductor of the circuit, and the conductor is located at a non-display area of the flexible substrate.
A flexible display system addresses the challenge of integrating conductive features with a flexible substrate while maintaining display functionality and structural integrity. The invention involves a flexible display with a plurality of conductive features bonded to a conductor, which is positioned in a non-display area of the flexible substrate. The non-display area is a region outside the active display zone, ensuring that the conductor does not interfere with the visual output. The conductive features, such as electrodes or traces, are electrically connected to the conductor, enabling signal transmission or power distribution without disrupting the display's flexibility or performance. This design allows for efficient routing of electrical connections while preserving the flexibility and durability of the display. The conductor may be embedded within or attached to the substrate, ensuring a robust connection that withstands bending and deformation. The invention is particularly useful in applications requiring flexible, lightweight, and reliable displays, such as wearable devices, foldable electronics, or curved-screen displays. By locating the conductor in a non-display area, the system avoids visual obstructions and maintains a seamless viewing experience. The bonding process ensures a secure and conductive interface between the features and the conductor, enhancing overall reliability. This approach optimizes space utilization and electrical performance in flexible display technologies.
13. The flexible display of claim 9, further including an organic light-emitting diode formed over the flexible substrate.
A flexible display system addresses the need for lightweight, durable, and adaptable display technologies that can conform to various shapes and surfaces. Traditional rigid displays limit applications in wearable electronics, foldable devices, and curved surfaces. This invention improves upon prior flexible displays by integrating an organic light-emitting diode (OLED) directly onto a flexible substrate. The OLED layer emits light when an electric current is applied, providing high brightness, wide viewing angles, and energy efficiency. The flexible substrate, which may be made of materials like polyimide or thin glass, supports the OLED layer while allowing the display to bend or fold without damage. Additional layers, such as encapsulation, may be included to protect the OLED from environmental factors like moisture and oxygen. The combination of the flexible substrate and OLED enables the display to conform to curved or irregular surfaces, making it suitable for applications in wearable devices, foldable smartphones, and flexible signage. The invention enhances durability and versatility compared to rigid displays while maintaining high performance in terms of brightness and color accuracy.
14. The flexible display of claim 13, wherein the organic light-emitting diode is located at a display area of the flexible substrate.
A flexible display system addresses the challenge of integrating organic light-emitting diodes (OLEDs) into flexible substrates while maintaining display functionality. The invention involves a flexible display with an OLED positioned at a designated display area of the flexible substrate. The substrate is designed to bend or flex without damaging the OLED, ensuring reliable performance. The OLED emits light to form images or visual content, while the flexible substrate provides structural support and enables the display to conform to curved or irregular surfaces. Additional components, such as encapsulation layers, may be included to protect the OLED from environmental factors like moisture and oxygen. The display may also incorporate conductive traces or interconnects to supply power and signals to the OLED. This design allows for applications in wearable devices, foldable electronics, and other flexible display technologies where traditional rigid displays are impractical. The OLED's placement at the display area ensures optimal light emission and visibility, while the flexible substrate enables dynamic form factors. The invention improves upon prior art by providing a durable, high-performance flexible display solution.
15. The flexible display of claim 13, wherein the organic light-emitting diode is located at a central flat portion of the flexible substrate.
A flexible display system addresses the challenge of integrating high-performance organic light-emitting diodes (OLEDs) into bendable or foldable substrates while maintaining display quality and durability. The invention features a flexible substrate with a central flat portion where the OLED is positioned, ensuring optimal light emission and structural stability. The substrate may include additional curved or bendable regions surrounding the central portion, allowing the display to conform to various shapes or devices. The OLED is designed to emit light efficiently while accommodating the mechanical flexibility of the substrate. This configuration enables applications in wearable devices, foldable smartphones, and other form factors requiring both flexibility and high-resolution visual output. The central placement of the OLED minimizes stress on the light-emitting components during bending, enhancing longevity and performance. The system may also incorporate protective layers or encapsulation to shield the OLED from environmental damage while preserving flexibility. This design balances display functionality with mechanical adaptability, addressing limitations in traditional rigid displays.
16. The flexible display of claim 13, wherein the circuit includes a plurality of conductive lines electrically connected between the semiconductor device and organic light-emitting diode.
A flexible display system addresses the challenge of integrating electronic components with organic light-emitting diodes (OLEDs) in a bendable form factor. The invention includes a flexible substrate supporting a semiconductor device, such as a thin-film transistor (TFT), and an OLED for emitting light. A circuit layer is embedded within the display structure, containing multiple conductive lines that establish electrical connections between the semiconductor device and the OLED. These conductive lines enable signal transmission and power delivery, ensuring proper operation of the OLED while maintaining flexibility. The design allows the display to conform to curved surfaces or undergo repeated bending without compromising electrical performance. The conductive lines may be arranged in a specific pattern to optimize conductivity, reduce resistance, and minimize signal loss. This configuration enhances the reliability and durability of the flexible display, making it suitable for applications in wearable electronics, foldable devices, and other flexible display technologies. The invention focuses on improving the electrical interconnection between the semiconductor device and the OLED to ensure consistent performance in dynamic bending scenarios.
17. The flexible display of claim 9, wherein the semiconductor device is positioned at the rear side of the flexible display.
A flexible display system includes a flexible display panel and a semiconductor device integrated with the display. The semiconductor device is positioned at the rear side of the flexible display, opposite the viewing surface. The semiconductor device may include a driver circuit for controlling the display, such as a gate driver or a data driver, or it may be a sensor, such as a touch sensor or a biometric sensor. The flexible display panel is constructed from a flexible substrate, such as a polymer or thin glass, and includes an array of pixels for displaying images. The semiconductor device is attached to the rear side of the display panel using an adhesive or other bonding method, ensuring flexibility and durability. The system may also include a flexible printed circuit board (FPCB) connected to the semiconductor device for signal transmission. The rear-side placement of the semiconductor device reduces the overall thickness of the display while maintaining flexibility and performance. This design is particularly useful in wearable devices, foldable smartphones, and other applications requiring compact, flexible displays.
19. The semiconductor device of claim 18, wherein the substrate further includes a base layer, and the interlayer dielectric layer is formed on the base layer.
A semiconductor device includes a substrate with a base layer and an interlayer dielectric layer formed on the base layer. The device also features a first conductive structure embedded within the interlayer dielectric layer, where the first conductive structure includes a first conductive material and a first barrier layer surrounding the first conductive material. The first barrier layer is composed of a first barrier material that is different from the first conductive material. The device further includes a second conductive structure embedded within the interlayer dielectric layer, where the second conductive structure includes a second conductive material and a second barrier layer surrounding the second conductive material. The second barrier layer is composed of a second barrier material that is different from the second conductive material. The first and second conductive structures are electrically isolated from each other by the interlayer dielectric layer. The first and second barrier layers prevent diffusion of the first and second conductive materials into the interlayer dielectric layer. The first and second conductive materials may be different from each other, and the first and second barrier materials may also be different from each other. The device is designed to improve electrical performance and reliability by minimizing material diffusion and ensuring proper electrical isolation between conductive structures.
20. The semiconductor device of claim 19, wherein the substrate further includes a pre-metal dielectric layer between the base layer and the interlayer dielectric layer.
A semiconductor device includes a substrate with a base layer, an interlayer dielectric layer, and a pre-metal dielectric layer positioned between the base layer and the interlayer dielectric layer. The base layer provides structural support and electrical insulation, while the interlayer dielectric layer insulates conductive features embedded within it. The pre-metal dielectric layer serves as an additional insulating barrier, improving electrical isolation and reducing leakage currents between the base layer and the interlayer dielectric layer. This configuration enhances device reliability and performance by minimizing parasitic capacitance and signal interference. The device may also include conductive features, such as vias or interconnects, embedded within the interlayer dielectric layer to facilitate electrical connections between different layers. The pre-metal dielectric layer ensures proper insulation and structural integrity, particularly in advanced semiconductor devices where multiple conductive layers are stacked closely together. This design is useful in integrated circuits, microprocessors, and memory devices where precise electrical isolation and high-performance signal transmission are critical.
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March 30, 2023
June 11, 2024
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