The invention provides an operation method of a semiconductor system, which includes providing a system which includes a layout pattern to scanning electron microscope (SEM) pattern prediction model (LS model) and a novelty detection model (ND model), inputting a layout pattern to the ND model, and the ND model judges whether the layout pattern is a novel layout pattern, and if the layout pattern is confirmed as the novel layout pattern after judgment, performing a process step on the novel layout pattern to form an SEM (scanning electron microscope) pattern.
Legal claims defining the scope of protection, as filed with the USPTO.
2. The operation method of the semiconductor system according to claim 1, wherein the novelty detection model comprises an auto encoder comparison model and a support vector machine (SVM) comparison model.
3. The operation method of the semiconductor system according to claim 2, wherein after the layout pattern is input into the novelty detection model, the novelty detection model performs an information compression step on the layout pattern and extracts a latent code from the layout pattern.
4. The operation method of the semiconductor system according to claim 3, wherein the auto encoder comparison model performs a decompression step on the latent code to generate a reconstructed pattern, and compares the reconstructed pattern with the layout pattern.
5. The operation method of the semiconductor system according to claim 3, wherein the support vector machine (SVM) comparison model performs a support vector machine (SVM) comparison step on the latent code.
6. The operation method of the semiconductor system according to claim 1, wherein the process step is carried out by using the novel layout pattern, the generated SEM pattern is also input into a database of the LS model for training the machine learning model.
7. The operation method of the semiconductor system according to claim 1, wherein if the layout pattern is confirmed not to be the novel layout pattern after judgment, the SEM pattern of the layout pattern will not be collected.
9. The semiconductor system according to claim 8, wherein the novelty detection model comprises an auto encoder comparison model and a support vector machine (SVM) comparison model.
10. The semiconductor system according to claim 8, wherein the LS model comprises a machine learning model, and the machine learning model stores a plurality of latent codes of the layout patterns and the corresponding SEM patterns.
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January 12, 2022
July 9, 2024
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