A shift register includes: an input circuit electrically connected to a first clock signal terminal, a first voltage signal terminal and a first node; a first output circuit electrically connected to the first node, a second clock signal terminal and a scanning signal terminal; a first control circuit electrically connected to a third clock signal terminal, a fourth clock signal terminal, a fifth clock signal terminal and the first node; a second control circuit electrically connected to a sixth clock signal terminal, a second voltage signal terminal, the first node, the first voltage signal terminal and a second node; a third control circuit electrically connected to the first node, the second voltage signal terminal, the third clock signal terminal and the second node; and a second output circuit electrically connected to the second node, the second voltage signal terminal and the scanning signal terminal.
Legal claims defining the scope of protection, as filed with the USPTO.
19. A scan driving circuit, comprising a plurality of shift registers that are connected in cascade according to claim 1.
20. A display apparatus, comprising the scan driving circuit according to claim 19.
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May 26, 2021
July 16, 2024
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