Patentable/Patents/US-12051471
US-12051471

Read disturb management

PublishedJuly 30, 2024
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

An example system can include a memory device and a processing device. The memory device can include a group of memory cells. The processing device can be coupled to the memory device. The processing device can be configured to determine a distance of a memory die from a center of a memory component. The processing device can be configured to perform a read disturb operation on the memory die based on the determined distance use a first voltage window for a set of memory cells of the group of memory cells during a first time period.

Patent Claims
17 claims

Legal claims defining the scope of protection, as filed with the USPTO.

2

2. The apparatus of claim 1, wherein the memory component is a memory wafer.

3

3. The apparatus of claim 1, wherein the processing device is configured to perform the read disturb operation by determining a window size.

4

4. The apparatus of claim 3, wherein the processing device is configured to determine a smaller window size in response to determining a greater distance.

5

5. The apparatus of claim 3, wherein the processing device is configured to determine a larger window size in response to determining a smaller distance.

6

6. The apparatus of claim 1, wherein the processing device is configured to perform the read disturb operation by determining a scan frequency.

7

7. The apparatus of claim 6, wherein the processing device is configured to determine a lower scan frequency in response to a smaller distance.

8

8. The apparatus of claim 6, wherein the processing device is configured to determine a higher scan frequency in response to a larger distance.

10

10. The method of claim 9, wherein the window size is decreased in response to the distance of the memory die from the center of the memory component being a greater distance.

11

11. The method of claim 9, wherein the window size is increased in response to the distance of the memory die from the center of the memory component being a lesser distance.

12

12. The method of claim 9, wherein performing the read disturb operation comprises selecting a random read operation of the memory die within the window size.

13

13. The method of claim 12, wherein performing the read disturb operation comprises checking a raw bit error rate (RBER) of victim word lines associated with the random read operation of the memory die.

14

14. The method of claim 13, wherein, in response to the RBER being greater than a threshold RBER, performing a refresh on a block of memory where the random read operation was performed.

15

15. The method of claim 13, wherein, in response to the RBER being less than a threshold RBER, not performing a refresh operation on a block of memory where the random read operation was performed.

17

17. The system of claim 16, wherein the processing device is configured to determine a scan frequency based on the determined distances of each of the group of memory dies.

18

18. The system of claim 17, wherein the scan frequency is decreased in response to the determined distance being smaller.

19

19. The system of claim 17, wherein the scan frequency is increased in response to the determined distance being greater.

20

20. The system of claim 16, wherein the processing device is further configured to determine the window size for each of the group of memory dies based on a program/erase count (PEC) for each of the group of memory dies.

Classification Codes (CPC)

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Patent Metadata

Filing Date

July 22, 2022

Publication Date

July 30, 2024

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Cite as: Patentable. “Read disturb management” (US-12051471). https://patentable.app/patents/US-12051471

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