A photoresist material is deposited, patterned, and developed on a backside of a wafer to expose specific regions on the backside of chips for etching. These specific regions are etched to form etched regions through the backside of the chips to a specified depth within the chips. The specified depth may correspond to an etch stop material. Etching of the backside of the wafer can also be done along the chip kerf regions to reduce stress during singulation/dicing of individual chips from the wafer. Etching of the backside of the chips can be done with the chips still part of the intact wafer. Or, the wafer having the pattered and developed photoresist on its backside can be singulated/diced before etching through the backside of the individual chips. The etched region(s) formed through the backside of a chip can be used for attachment of optical component(s) to the chip.
Legal claims defining the scope of protection, as filed with the USPTO.
4. The method as recited in claim 1, wherein the etched region includes one or more optical fiber alignment structures.
7. The method as recited in claim 1, wherein the etched region of any given semiconductor chip is a hole formed through the backside of the given semiconductor chip to a prescribed depth within an overall thickness of the given semiconductor chip.
8. The method as recited in claim 7, wherein the prescribed depth corresponds to an etch stop material present within the given semiconductor chip.
9. The method as recited in claim 8, wherein the etch stop material is an oxide layer.
10. The method as recited in claim 1, wherein each of the particular regions is located inside of the respective area occupied by a corresponding one of the semiconductor chips.
12. The method as recited in claim 1, wherein exposing particular regions of the backside of the semiconductor wafer through the photoresist material includes aligning the semiconductor wafer by optical detection of optically detectable features present within the semiconductor wafer, wherein the optical detection is done by looking toward the backside of the semiconductor wafer.
18. The method as recited in claim 14, wherein the etched region includes one or more optical fiber alignment structures.
19. The method as recited in claim 14, wherein the optical component is a III-V material die.
21. The method as recited in claim 14, wherein the etched region of any given semiconductor chip extends to a prescribed depth within an overall thickness of the given semiconductor chip.
22. The method as recited in claim 21, wherein the prescribed depth corresponds to an etch stop material present within the given semiconductor chip.
23. The method as recited in claim 22, wherein the etch stop material is an oxide layer.
24. The method as recited in claim 14, wherein exposing the separate regions of the backside of the semiconductor wafer through the photoresist material includes aligning the semiconductor wafer by optical detection of optically detectable features present within the semiconductor wafer from the backside of the semiconductor wafer.
28. The method as recited in claim 27, wherein the particular regions include one or more areas on the backside of each of the plurality of semiconductor chips, each of the one or more areas including one or more optical fiber alignment structures.
30. The method as recited in claim 27, wherein the optical component is a III-V material die.
32. The method as recited in claim 26, wherein the etched region within a particular semiconductor chip of the plurality of semiconductor chips is a hole formed through the backside of the particular semiconductor chip to a prescribed depth within an overall thickness of the particular semiconductor chip.
33. The method as recited in claim 32, wherein the prescribed depth corresponds to an etch stop material present within the given semiconductor wafer.
34. The method as recited in claim 33, wherein the etch stop material is an oxide layer.
35. The method as recited in claim 26, wherein exposing particular regions of the backside of the semiconductor wafer through the photoresist material includes aligning the semiconductor wafer by optical detection of optically detectable features present within the semiconductor wafer from the backside of the semiconductor wafer, wherein each of the optically detectable features is located within an overall thickness of the semiconductor wafer at a corresponding location between the top surface of the substrate and the frontside of the semiconductor wafer.
41. The method as recited in claim 37, wherein the etched region includes one or more optical fiber alignment structures.
43. The method as recited in claim 42, wherein the electro-optical device is a III-V material die.
44. The method as recited in claim 37, wherein the etched region of any given semiconductor chip extends to a prescribed depth within an overall thickness of the given semiconductor chip.
45. The method as recited in claim 44, wherein the prescribed depth corresponds to an etch stop material present within the given semiconductor chip.
46. The method as recited in claim 45, wherein the etch stop material is an oxide layer.
47. The method as recited in claim 37, wherein the electro-optical device is placed over a grating structure formed within the at least one of the semiconductor chips.
48. The method as recited in claim 37, wherein electrical contacts of the electro-optical device are electrically connected to one or more interconnect layers within the at least one of the semiconductor chips.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
July 10, 2017
August 6, 2024
Browse 5M+ US patents with plain-English claim translations and AI-generated analysis.