A semiconductor apparatus includes a stack of a first chip having a plurality of pixel circuits arranged in a matrix form and a second chip having a plurality of electric circuit arranged in a matrix form. A wiring path between a semiconductor element configuring the pixel circuit and a semiconductor element configuring the electric circuit or a positional relationship between a semiconductor element configuring the pixel circuit and a semiconductor element configuring the electric circuit is differentiated among the electric circuits.
Legal claims defining the scope of protection, as filed with the USPTO.
10. The semiconductor apparatus according to claim 1, wherein at least first one of the plurality of first semiconductor elements and at least first one of the plurality of second semiconductor elements are electrically connected via the first conductive portion and the third conductive portion.
36. The semiconductor apparatus according to claim 34, wherein the pixel circuit further includes a charge detection unit configured to receive charges from the photoelectric conversion element, and a reset transistor configured to reset the charge detection unit.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
December 1, 2022
August 6, 2024
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