A semiconductor die package and a method of forming the same are provided. The semiconductor die package includes a package substrate and a semiconductor device disposed over the package substrate. A ring structure is disposed over the package substrate and laterally surrounds the semiconductor device. The ring structure includes a lower ring portion arranged around the periphery of the package substrate. Multiple notches are formed along the outer periphery of the lower ring portion. The ring structure also includes an upper ring portion integrally formed on the lower ring portion. The upper ring portion laterally extends toward the semiconductor device, so that the inner periphery of the upper ring portion is closer to the semiconductor device than the inner periphery of the lower ring portion. An adhesive layer is interposed between the lower ring portion and the package substrate.
Legal claims defining the scope of protection, as filed with the USPTO.
2. The semiconductor die package as claimed in claim 1, wherein an outer periphery of the upper ring portion is spaced apart from the outer periphery of the lower ring portion.
3. The semiconductor die package as claimed in claim 1, wherein there is a gap between a bottom surface of the upper ring portion and the first surface of the package substrate.
4. The semiconductor die package as claimed in claim 1, wherein the adhesive layer is interposed between a bottom surface of the lower ring portion and the first surface of the package substrate.
5. The semiconductor die package as claimed in claim 1, wherein the plurality of notches penetrate a top surface and a bottom surface of the lower ring portion, and extend from the outer periphery of the lower ring portion to the inner periphery of the lower ring portion located below the upper ring portion.
6. The semiconductor die package as claimed in claim 1, wherein the lower ring portion has a rectangular ring shape with four corners and four sides, and the plurality of notches are formed on the four sides.
7. The semiconductor die package as claimed in claim 6, wherein each of the plurality of notches extends in a direction perpendicular to an extending direction of the respective side of the lower ring portion.
8. The semiconductor die package as claimed in claim 1, wherein the plurality of notches have a uniform size.
9. The semiconductor die package as claimed in claim 1, wherein the plurality of notches have two or more different sizes.
10. The semiconductor die package as claimed in claim 1, wherein there is a gap between the inner periphery of the upper ring portion and the semiconductor device, when viewed in a direction perpendicular to the first surface of the package substrate.
12. The semiconductor die package as claimed in claim 11, wherein a part of the top surface of the lower ring portion is exposed from the upper ring portion.
13. The semiconductor die package as claimed in claim 11, wherein a bottom surface of the part of the upper ring portion is spaced apart from the first surface of the package substrate, and is separated from the adhesive layer.
14. The semiconductor die package as claimed in claim 11, wherein the lower ring portion comprises four corners and four sides, and the all sides of the lower ring portion respectively further have a plurality of solid columns, wherein each of the notches is interposed between adjacent solid columns or between adjacent solid column and corner, and the notches extend from an outer periphery of the lower ring portion toward the inner periphery of the lower ring portion.
15. The semiconductor die package as claimed in claim 14, wherein the adhesive layer is formed at the four corners of the lower ring portion.
16. The semiconductor die package as claimed in claim 14, wherein the adhesive layer is formed at the four corners and the plurality of solid columns of the lower ring portion.
17. The semiconductor die package as claimed in claim 14, wherein each of the notches extends in a direction perpendicular to an extending direction of the respective side of the lower ring portion.
18. The semiconductor die package as claimed in claim 14, wherein some of the notches extend in a direction oblique to an extending direction of the respective side of the lower ring portion.
20. The semiconductor die package as claimed in claim 19, wherein the lower ring portion comprises four corners and four sides, and all of the four sides respectively have a plurality of solid columns, wherein each of the plurality of notches is formed between adjacent solid columns, between adjacent corners, or between adjacent solid column and corner, wherein the adhesive layer is formed at the four corners and the plurality of solid columns.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
August 31, 2021
August 20, 2024
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