Induced super-junction transistors

An apparatus includes a first drain/source region and a second drain/source region over a substrate, a first gate adjacent to the first drain/source region, the first gate comprising a plurality of first fingers forming a first comb structure, and a second gate adjacent to the second drain/source region, the second gate comprising a plurality of second fingers forming a second comb structure, wherein the plurality of first fingers and the plurality of second fingers are placed in an alternating manner, and wherein the first drain/source region, the second drain/source region, the first gate and the second gate form two back-to-back connected transistors.