This application is directed to data protection in a memory system of an electronic device. The memory system has a first memory block and a second memory block, and each memory block includes one or more respective memory dies. Each memory die of the second memory block is distinct from the one or more respective memory dies of the first memory block. The electronic device stores user data including a plurality of user data items in the first memory block and integrity data including a plurality of integrity data items in the second memory block. Each of the plurality of user data items is configured to be validated based on a respective one of the plurality of integrity data items. The electronic device invalidates the integrity data in the second memory block, and reads the user data from the first memory block independently of the integrity data.
Legal claims defining the scope of protection, as filed with the USPTO.
5. The method of claim 1, wherein the memory system includes a solid state drive of the electronic device, each memory die including a plurality of memory planes, each memory planes including a plurality of memory pages, each memory page including a plurality of memory cells.
8. The method of claim 5, wherein the memory system includes a plurality of memory blocks, and the second memory block is a last memory block of the plurality of memory blocks.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
February 23, 2023
October 15, 2024
Browse 5M+ US patents with plain-English claim translations and AI-generated analysis.