Patentable/Patents/US-12125703
US-12125703

Method of manufacturing semiconductor device

PublishedOctober 22, 2024
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

After a plurality of trenches is formed in an SOI substrate, a side surface of the insulating layer is retreated from a side surface of the semiconductor layer and a side surface of the semiconductor substrate. Next, the side surface of the insulating layer is covered with an organic film and also the side surface of the semiconductor layer is exposed from the organic film by performing an anisotropic etching process to the organic film embedded into an inside of each of the plurality of trenches. Next, each of the side surface of the semiconductor layer and the side surface of the semiconductor substrate is approached to the side surface of the insulating layer by performing an isotropic etching process. Further, after the organic film is removed, an oxidation treatment is performed to each of the side surface of the semiconductor layer and the side surface of the semiconductor substrate.

Patent Claims
3 claims

Legal claims defining the scope of protection, as filed with the USPTO.

2

2. The method of manufacturing a semiconductor device according to claim 1, wherein a part of the side surface of the semiconductor substrate in the first region is also exposed from the organic film in the (g).

3

3. The method of manufacturing a semiconductor device according to claim 1, wherein the side surface of the semiconductor layer in the second region, the side surface of the insulating layer in the second region, and the side surface of the semiconductor substrate in the second region are covered with the organic film in the second region during the isotropic etching process in the (h).

4

4. The method of manufacturing a semiconductor device according to claim 3, wherein the (j) is performed in a state where a part of an upper surface of the semiconductor substrate in the second region is exposed from the insulating layer in the second region.

Classification Codes (CPC)

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Patent Metadata

Filing Date

March 17, 2022

Publication Date

October 22, 2024

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