Embodiments of the present disclosure propose a semiconductor packaging method and a semiconductor structure. The semiconductor packaging method includes: providing a substrate; forming a metal pad on the substrate, where there is a gap between a sidewall of the metal pad and the substrate; and connecting multiple metal pads on substrates to each other.
Legal claims defining the scope of protection, as filed with the USPTO.
7. The semiconductor packaging method according to claim 1, wherein the groove comprises a first groove and a second groove, the second groove is located below the first groove, and a size of an opening of the second groove is smaller than a size of a bottom of the first groove.
11. The semiconductor packaging method according to claim 9, wherein a ratio of a length of the gap in a direction along the sidewall of the first groove to a length of the sidewall of the first groove is 0.1-0.5.
14. The semiconductor packaging method according to claim 12, wherein a ratio of a length of the gap in a direction along the sidewall of the first groove to a length of the sidewall of the first groove is 0.01-0.1.
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October 27, 2021
October 29, 2024
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