A semiconductor device according to one embodiment includes: a semiconductor substrate; a peripheral circuit provided on the semiconductor substrate; and a stacked body provided above the peripheral circuit, which has a memory cell array. The peripheral circuit includes: a metal film including silicon; a silicide film stacked on the metal film; and a barrier metal film stacked on the silicide film.
Legal claims defining the scope of protection, as filed with the USPTO.
4. The semiconductor device according to claim 3, wherein the semiconductor region is adjacent to the dielectric film.
6. The semiconductor device according to claim 5, wherein the silicide film has a thickness of 1 nm or more and 3 nm or less.
7. The semiconductor device according to claim 5, wherein in the metal film, a composition of the tungsten and the silicon, WSix, is in the range of 2<x<3.
9. The manufacturing method of the semiconductor device according to claim 8, wherein in the process after forming the barrier metal film, the memory cell array is formed.
10. The manufacturing method of the semiconductor device according to claim 8, wherein the heat is within a range of 800 to 900° C.
13. The manufacturing method of the semiconductor device according to claim 12, wherein the silicide film has a thickness of 1 nm or more and 3 nm or less.
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December 6, 2021
November 26, 2024
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